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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00

Refine SPI bitbanging

Change the SPI bitbanging core to fix a subtle bug (which had no
effect so far) and to make integration of the RayeR SPIPGM and Nvidia
MCP6x/MCP7x SPI patches easier. Kill a few global variables and require
explicit initialization of bitbanging delay.

A big to Johannes Sjölund for testing an earlier version of the code as
part of the Nvidia MCP6x/MCP7x SPI bitbanging patch.

Corresponding to flashrom svn r1085.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
Carl-Daniel Hailfinger
2010-07-17 12:54:09 +00:00
parent 1a854fc98c
commit 0d974e7a92
3 changed files with 25 additions and 16 deletions

View File

@ -176,6 +176,10 @@ cpu_to_be(64)
#define __DARWIN__
#endif
/* Clarification about OUTB/OUTW/OUTL argument order:
* OUT[BWL](val, port)
*/
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <machine/cpufunc.h>
#define off64_t off_t