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Refine SPI bitbanging
Change the SPI bitbanging core to fix a subtle bug (which had no effect so far) and to make integration of the RayeR SPIPGM and Nvidia MCP6x/MCP7x SPI patches easier. Kill a few global variables and require explicit initialization of bitbanging delay. A big to Johannes Sjölund for testing an earlier version of the code as part of the Nvidia MCP6x/MCP7x SPI bitbanging patch. Corresponding to flashrom svn r1085. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
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@ -26,46 +26,55 @@
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#include "chipdrivers.h"
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#include "chipdrivers.h"
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#include "spi.h"
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#include "spi.h"
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/* Length of half a clock period in usecs */
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/* Length of half a clock period in usecs. */
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int bitbang_spi_half_period = 0;
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static int bitbang_spi_half_period;
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enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID;
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static enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID;
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const struct bitbang_spi_master_entry bitbang_spi_master_table[] = {
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static const struct bitbang_spi_master_entry bitbang_spi_master_table[] = {
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{}, /* This entry corresponds to BITBANG_SPI_INVALID. */
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{}, /* This entry corresponds to BITBANG_SPI_INVALID. */
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};
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};
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const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table);
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const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table);
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void bitbang_spi_set_cs(int val)
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/* Note that CS# is active low, so val=0 means the chip is active. */
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static void bitbang_spi_set_cs(int val)
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{
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{
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bitbang_spi_master_table[bitbang_spi_master].set_cs(val);
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bitbang_spi_master_table[bitbang_spi_master].set_cs(val);
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}
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}
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void bitbang_spi_set_sck(int val)
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static void bitbang_spi_set_sck(int val)
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{
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{
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bitbang_spi_master_table[bitbang_spi_master].set_sck(val);
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bitbang_spi_master_table[bitbang_spi_master].set_sck(val);
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}
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}
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void bitbang_spi_set_mosi(int val)
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static void bitbang_spi_set_mosi(int val)
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{
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{
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bitbang_spi_master_table[bitbang_spi_master].set_mosi(val);
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bitbang_spi_master_table[bitbang_spi_master].set_mosi(val);
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}
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}
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int bitbang_spi_get_miso(void)
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static int bitbang_spi_get_miso(void)
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{
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{
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return bitbang_spi_master_table[bitbang_spi_master].get_miso();
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return bitbang_spi_master_table[bitbang_spi_master].get_miso();
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}
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}
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int bitbang_spi_init(void)
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int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod)
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{
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{
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bitbang_spi_master = master;
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bitbang_spi_half_period = halfperiod;
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if (bitbang_spi_master == BITBANG_SPI_INVALID) {
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msg_perr("Invalid bitbang SPI master. \n"
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"Please report a bug at flashrom@flashrom.org\n");
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return 1;
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}
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bitbang_spi_set_cs(1);
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bitbang_spi_set_cs(1);
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bitbang_spi_set_sck(0);
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bitbang_spi_set_sck(0);
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buses_supported = CHIP_BUSTYPE_SPI;
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bitbang_spi_set_mosi(0);
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return 0;
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return 0;
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}
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}
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uint8_t bitbang_spi_readwrite_byte(uint8_t val)
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static uint8_t bitbang_spi_readwrite_byte(uint8_t val)
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{
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{
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uint8_t ret = 0;
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uint8_t ret = 0;
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int i;
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int i;
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6
flash.h
6
flash.h
@ -133,8 +133,6 @@ enum bitbang_spi_master {
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extern const int bitbang_spi_master_count;
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extern const int bitbang_spi_master_count;
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extern enum bitbang_spi_master bitbang_spi_master;
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struct bitbang_spi_master_entry {
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struct bitbang_spi_master_entry {
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void (*set_cs) (int val);
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void (*set_cs) (int val);
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void (*set_sck) (int val);
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void (*set_sck) (int val);
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@ -533,9 +531,7 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
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int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
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/* bitbang_spi.c */
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/* bitbang_spi.c */
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extern int bitbang_spi_half_period;
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int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod);
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extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
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int bitbang_spi_init(void);
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int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
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int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
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int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
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int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
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@ -176,6 +176,10 @@ cpu_to_be(64)
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#define __DARWIN__
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#define __DARWIN__
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#endif
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#endif
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/* Clarification about OUTB/OUTW/OUTL argument order:
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* OUT[BWL](val, port)
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*/
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#if defined(__FreeBSD__) || defined(__DragonFly__)
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#if defined(__FreeBSD__) || defined(__DragonFly__)
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#include <machine/cpufunc.h>
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#include <machine/cpufunc.h>
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#define off64_t off_t
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#define off64_t off_t
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