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https://review.coreboot.org/flashrom.git
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spi4ba: Drop now obsolete, redundant functions
Change-Id: I1d04448fd1acbfc37b8e17288f497a4292dfd6d6 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22387 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
parent
7a07722256
commit
0ee2dc0683
651
spi4ba.c
651
spi4ba.c
@ -134,246 +134,6 @@ int spi_exit_4ba_e9_we(struct flashctx *flash)
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return result;
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return result;
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}
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}
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/* Program one flash byte from 4-bytes addressing mode */
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int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_BYTE_PROGRAM,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff),
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databyte
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X)\n", __func__, addr);
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result = spi_send_multicommand(flash, cmds);
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if (result)
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msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
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return result;
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}
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/* Program flash bytes from 4-bytes addressing mode */
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int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len)
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{
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int result;
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unsigned char cmd[(JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1 + 256] = {
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JEDEC_BYTE_PROGRAM,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr >> 0) & 0xff
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};
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = (JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1 + len,
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.writearr = cmd,
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
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if (!len) {
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msg_cerr("%s called for zero-length write\n", __func__);
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return 1;
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}
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if (len > 256) {
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msg_cerr("%s called for too long a write\n", __func__);
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return 1;
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}
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memcpy(&cmd[(JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1], bytes, len);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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}
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return result;
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}
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/* Read flash bytes from 4-bytes addressing mode */
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int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len)
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{
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const unsigned char cmd[JEDEC_READ_OUTSIZE + 1] = {
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JEDEC_READ,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr >> 0) & 0xff
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};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
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/* Send Read */
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return spi_send_command(flash, sizeof(cmd), len, cmd, bytes);
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}
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/* Erase one sector of flash from 4-bytes addressing mode */
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int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_SE_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_SE,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 15-800 ms, so wait in 10 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(10 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Erase one sector of flash from 4-bytes addressing mode */
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int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_52_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_BE_52,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(100 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Erase one sector of flash from 4-bytes addressing mode */
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int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_D8_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_BE_D8,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(100 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Write Extended Address Register value */
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/* Write Extended Address Register value */
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int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata)
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int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata)
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{
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{
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@ -409,417 +169,6 @@ int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata)
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return 0;
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return 0;
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}
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}
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/* Assign required value of Extended Address Register. This function
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keeps last value of the register and writes the register if the
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value has to be changed only. */
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int set_extended_address_register(struct flashctx *flash, uint8_t data)
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{
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static uint8_t ext_addr_reg_state; /* memory for last register state */
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static int ext_addr_reg_state_valid = 0;
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int result;
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if (ext_addr_reg_state_valid == 0 || data != ext_addr_reg_state) {
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result = spi_write_extended_address_register(flash, data);
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if (result) {
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ext_addr_reg_state_valid = 0;
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return result;
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}
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ext_addr_reg_state = data;
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ext_addr_reg_state_valid = 1;
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}
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return 0;
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}
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/* Program one flash byte using Extended Address Register
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from 3-bytes addressing mode */
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int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr,
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uint8_t databyte)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE,
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.writearr = (const unsigned char[]){
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JEDEC_BYTE_PROGRAM,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff),
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databyte
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X)\n", __func__, addr);
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result = set_extended_address_register(flash, (addr >> 24) & 0xff);
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if (result)
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return result;
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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}
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return result;
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}
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/* Program flash bytes using Extended Address Register
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from 3-bytes addressing mode */
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int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr,
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const uint8_t *bytes, unsigned int len)
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{
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int result;
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unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = {
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JEDEC_BYTE_PROGRAM,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr >> 0) & 0xff
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};
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + len,
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.writearr = cmd,
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
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if (!len) {
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msg_cerr("%s called for zero-length write\n", __func__);
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return 1;
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}
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if (len > 256) {
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msg_cerr("%s called for too long a write\n", __func__);
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return 1;
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}
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memcpy(&cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1], bytes, len);
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result = set_extended_address_register(flash, (addr >> 24) & 0xff);
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if (result)
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return result;
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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}
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return result;
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}
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/* Read flash bytes using Extended Address Register
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from 3-bytes addressing mode */
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int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr,
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uint8_t *bytes, unsigned int len)
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{
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int result;
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|
||||||
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {
|
|
||||||
JEDEC_READ,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr >> 0) & 0xff
|
|
||||||
};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
|
|
||||||
|
|
||||||
result = set_extended_address_register(flash, (addr >> 24) & 0xff);
|
|
||||||
if (result)
|
|
||||||
return result;
|
|
||||||
|
|
||||||
/* Send Read */
|
|
||||||
return spi_send_command(flash, sizeof(cmd), len, cmd, bytes);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Erases 4 KB of flash using Extended Address Register
|
|
||||||
from 3-bytes addressing mode */
|
|
||||||
int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr,
|
|
||||||
unsigned int blocklen)
|
|
||||||
{
|
|
||||||
int result;
|
|
||||||
struct spi_command cmds[] = {
|
|
||||||
{
|
|
||||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = JEDEC_SE_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){
|
|
||||||
JEDEC_SE,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr & 0xff)
|
|
||||||
},
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = 0,
|
|
||||||
.writearr = NULL,
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
|
|
||||||
|
|
||||||
result = set_extended_address_register(flash, (addr >> 24) & 0xff);
|
|
||||||
if (result)
|
|
||||||
return result;
|
|
||||||
|
|
||||||
result = spi_send_multicommand(flash, cmds);
|
|
||||||
if (result) {
|
|
||||||
msg_cerr("%s failed during command execution at address 0x%x\n",
|
|
||||||
__func__, addr);
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
/* Wait until the Write-In-Progress bit is cleared.
|
|
||||||
* This usually takes 15-800 ms, so wait in 10 ms steps.
|
|
||||||
*/
|
|
||||||
while (spi_read_status_register(flash) & SPI_SR_WIP)
|
|
||||||
programmer_delay(10 * 1000);
|
|
||||||
/* FIXME: Check the status register for errors. */
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Erases 32 KB of flash using Extended Address Register
|
|
||||||
from 3-bytes addressing mode */
|
|
||||||
int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr,
|
|
||||||
unsigned int blocklen)
|
|
||||||
{
|
|
||||||
int result;
|
|
||||||
struct spi_command cmds[] = {
|
|
||||||
{
|
|
||||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = JEDEC_BE_52_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){
|
|
||||||
JEDEC_BE_52,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr & 0xff)
|
|
||||||
},
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = 0,
|
|
||||||
.writearr = NULL,
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
|
|
||||||
|
|
||||||
result = set_extended_address_register(flash, (addr >> 24) & 0xff);
|
|
||||||
if (result)
|
|
||||||
return result;
|
|
||||||
|
|
||||||
result = spi_send_multicommand(flash, cmds);
|
|
||||||
if (result) {
|
|
||||||
msg_cerr("%s failed during command execution at address 0x%x\n",
|
|
||||||
__func__, addr);
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
/* Wait until the Write-In-Progress bit is cleared.
|
|
||||||
* This usually takes 100-4000 ms, so wait in 100 ms steps.
|
|
||||||
*/
|
|
||||||
while (spi_read_status_register(flash) & SPI_SR_WIP)
|
|
||||||
programmer_delay(100 * 1000);
|
|
||||||
/* FIXME: Check the status register for errors. */
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Erases 64 KB of flash using Extended Address Register
|
|
||||||
from 3-bytes addressing mode */
|
|
||||||
int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr,
|
|
||||||
unsigned int blocklen)
|
|
||||||
{
|
|
||||||
int result;
|
|
||||||
struct spi_command cmds[] = {
|
|
||||||
{
|
|
||||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = JEDEC_BE_D8_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){
|
|
||||||
JEDEC_BE_D8,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr & 0xff)
|
|
||||||
},
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = 0,
|
|
||||||
.writearr = NULL,
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
|
|
||||||
|
|
||||||
result = set_extended_address_register(flash, (addr >> 24) & 0xff);
|
|
||||||
if (result)
|
|
||||||
return result;
|
|
||||||
|
|
||||||
result = spi_send_multicommand(flash, cmds);
|
|
||||||
if (result) {
|
|
||||||
msg_cerr("%s failed during command execution at address 0x%x\n",
|
|
||||||
__func__, addr);
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
/* Wait until the Write-In-Progress bit is cleared.
|
|
||||||
* This usually takes 100-4000 ms, so wait in 100 ms steps.
|
|
||||||
*/
|
|
||||||
while (spi_read_status_register(flash) & SPI_SR_WIP)
|
|
||||||
programmer_delay(100 * 1000);
|
|
||||||
/* FIXME: Check the status register for errors. */
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Program one flash byte with 4-bytes address from ANY mode (3-bytes or 4-bytes)
|
|
||||||
JEDEC_BYTE_PROGRAM_4BA (12h) instruction is new for 4-bytes addressing flash chips.
|
|
||||||
The presence of this instruction for an exact chip should be checked
|
|
||||||
by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */
|
|
||||||
int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr,
|
|
||||||
uint8_t databyte)
|
|
||||||
{
|
|
||||||
int result;
|
|
||||||
struct spi_command cmds[] = {
|
|
||||||
{
|
|
||||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = JEDEC_BYTE_PROGRAM_4BA_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){
|
|
||||||
JEDEC_BYTE_PROGRAM_4BA,
|
|
||||||
(addr >> 24) & 0xff,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr & 0xff),
|
|
||||||
databyte
|
|
||||||
},
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = 0,
|
|
||||||
.writearr = NULL,
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X)\n", __func__, addr);
|
|
||||||
|
|
||||||
result = spi_send_multicommand(flash, cmds);
|
|
||||||
if (result) {
|
|
||||||
msg_cerr("%s failed during command execution at address 0x%x\n",
|
|
||||||
__func__, addr);
|
|
||||||
}
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Program flash bytes with 4-bytes address from ANY mode (3-bytes or 4-bytes)
|
|
||||||
JEDEC_BYTE_PROGRAM_4BA (12h) instruction is new for 4-bytes addressing flash chips.
|
|
||||||
The presence of this instruction for an exact chip should be checked
|
|
||||||
by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */
|
|
||||||
int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr,
|
|
||||||
const uint8_t *bytes, unsigned int len)
|
|
||||||
{
|
|
||||||
int result;
|
|
||||||
unsigned char cmd[JEDEC_BYTE_PROGRAM_4BA_OUTSIZE - 1 + 256] = {
|
|
||||||
JEDEC_BYTE_PROGRAM_4BA,
|
|
||||||
(addr >> 24) & 0xff,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr >> 0) & 0xff
|
|
||||||
};
|
|
||||||
struct spi_command cmds[] = {
|
|
||||||
{
|
|
||||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
|
||||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = JEDEC_BYTE_PROGRAM_4BA_OUTSIZE - 1 + len,
|
|
||||||
.writearr = cmd,
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}, {
|
|
||||||
.writecnt = 0,
|
|
||||||
.writearr = NULL,
|
|
||||||
.readcnt = 0,
|
|
||||||
.readarr = NULL,
|
|
||||||
}};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
|
|
||||||
|
|
||||||
if (!len) {
|
|
||||||
msg_cerr("%s called for zero-length write\n", __func__);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
if (len > 256) {
|
|
||||||
msg_cerr("%s called for too long a write\n", __func__);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
memcpy(&cmd[JEDEC_BYTE_PROGRAM_4BA_OUTSIZE - 1], bytes, len);
|
|
||||||
|
|
||||||
result = spi_send_multicommand(flash, cmds);
|
|
||||||
if (result) {
|
|
||||||
msg_cerr("%s failed during command execution at address 0x%x\n",
|
|
||||||
__func__, addr);
|
|
||||||
}
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Read flash bytes with 4-bytes address from ANY mode (3-bytes or 4-bytes)
|
|
||||||
JEDEC_READ_4BA (13h) instruction is new for 4-bytes addressing flash chips.
|
|
||||||
The presence of this instruction for an exact chip should be checked
|
|
||||||
by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */
|
|
||||||
int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr,
|
|
||||||
uint8_t *bytes, unsigned int len)
|
|
||||||
{
|
|
||||||
const unsigned char cmd[JEDEC_READ_4BA_OUTSIZE] = {
|
|
||||||
JEDEC_READ_4BA,
|
|
||||||
(addr >> 24) & 0xff,
|
|
||||||
(addr >> 16) & 0xff,
|
|
||||||
(addr >> 8) & 0xff,
|
|
||||||
(addr >> 0) & 0xff
|
|
||||||
};
|
|
||||||
|
|
||||||
msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
|
|
||||||
|
|
||||||
/* Send Read */
|
|
||||||
return spi_send_command(flash, sizeof(cmd), len, cmd, bytes);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes)
|
/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes)
|
||||||
JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips.
|
JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips.
|
||||||
The presence of this instruction for an exact chip should be checked
|
The presence of this instruction for an exact chip should be checked
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user