mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-26 22:52:34 +02:00
Global cleanup: Fix a few spelling errors
Just a trivial patch to fix a few errors found by codespell. Here's the command I used: codespell -S subprojects,out \ -L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749 Reviewed-on: https://review.coreboot.org/c/flashrom/+/62840 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
005aa915a0
commit
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2
Makefile
2
Makefile
@ -77,7 +77,7 @@ endif
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# Set LC_ALL=C to minimize influences of the locale.
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# However, this won't work for the majority of relevant commands because they use the $(shell) function and
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# GNU make does not relay variables exported within the makefile to their evironment.
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# GNU make does not relay variables exported within the makefile to their environment.
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LC_ALL=C
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export LC_ALL
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@ -406,7 +406,7 @@ static int ch341a_spi_shutdown(void *data)
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static const struct spi_master spi_master_ch341a_spi = {
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.features = SPI_MASTER_4BA,
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/* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept atleast
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/* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept at least
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* 128 kB. Basically there should be no hard limit because transfers are broken up into USB packets
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* sent to the device and most of their payload streamed via SPI. */
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.max_data_read = 4 * 1024,
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@ -428,7 +428,7 @@ static int ch341a_spi_init(void)
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int32_t ret = libusb_init(NULL);
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if (ret < 0) {
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msg_perr("Couldnt initialize libusb!\n");
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msg_perr("Couldn't initialize libusb!\n");
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return -1;
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}
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@ -501,7 +501,7 @@ contents (using
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and store it to a medium outside of your computer, like
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a USB drive or a network share. If you needed to run the board enable code
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already for probing, use it for reading too.
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If reading succeeds and the contens of the read file look legit you can try to write the new image.
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If reading succeeds and the contents of the read file look legit you can try to write the new image.
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You should enable the board enable code in any case now, as it
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has been written because it is known that writing/erasing without the board
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enable is going to fail. In any case (success or failure), please report to
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@ -927,7 +927,7 @@ correspondingly. Example:
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.sp
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The parameter
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.B gpiolX=[HLC]
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allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as addtional CS#
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allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as additional CS#
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signal, where
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.B X
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can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly. The parameter may be specified
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@ -623,7 +623,7 @@ static unsigned int get_next_write(const uint8_t *have, const uint8_t *want, uns
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return first_len;
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}
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/* Returns the number of busses commonly supported by the current programmer and flash chip where the latter
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/* Returns the number of buses commonly supported by the current programmer and flash chip where the latter
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* can not be completely accessed due to size/address limits of the programmer. */
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unsigned int count_max_decode_exceedings(const struct flashctx *flash)
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{
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@ -483,7 +483,7 @@ static int ft2232_spi_init(void)
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arg = extract_programmer_param("csgpiol");
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if (arg) {
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csgpiol_set = true;
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msg_pwarn("Deprecation warning: `csgpiol` is deprectated and will be removed "
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msg_pwarn("Deprecation warning: `csgpiol` is deprecated and will be removed "
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"in the future.\nUse `gpiolX=C` instead.\n");
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char *endptr;
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@ -983,9 +983,9 @@ void prettyprint_ich_descriptor_upper_map(const struct ich_desc_upper_map *umap)
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uint32_t vscc = umap->vscc_table[i].VSCC;
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msg_pdbg2(" JID%d = 0x%08x\n", i, jid);
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msg_pdbg2(" VSCC%d = 0x%08x\n", i, vscc);
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msg_pdbg2(" "); /* indention */
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msg_pdbg2(" "); /* indentation */
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prettyprint_rdid(jid);
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msg_pdbg2(" "); /* indention */
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msg_pdbg2(" "); /* indentation */
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prettyprint_ich_reg_vscc(vscc, 0, false);
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}
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msg_pdbg2("\n");
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2
ichspi.c
2
ichspi.c
@ -996,7 +996,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
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}
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/* Program offset in flash into FADDR while preserve the reserved bits
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* and clearing the 25. address bit which is only useable in hwseq. */
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* and clearing the 25. address bit which is only usable in hwseq. */
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temp32 = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF;
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REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32);
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@ -71,7 +71,7 @@ enum chipbustype {
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/*
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* The following enum defines possible write granularities of flash chips. These tend to reflect the properties
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* of the actual hardware not necesserily the write function(s) defined by the respective struct flashchip.
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* of the actual hardware not necessarily the write function(s) defined by the respective struct flashchip.
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* The latter might (and should) be more precisely specified, e.g. they might bail out early if their execution
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* would result in undefined chip contents.
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*/
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@ -167,7 +167,7 @@ enum test_state {
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#define TEST_BAD_PREW (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD }
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struct flashrom_flashctx;
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#define flashctx flashrom_flashctx /* TODO: Agree on a name and convert all occurences. */
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#define flashctx flashrom_flashctx /* TODO: Agree on a name and convert all occurrences. */
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typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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enum flash_reg {
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@ -20,7 +20,7 @@
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#include <inttypes.h>
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/**
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* An convinent structure that contains the buffer size and the buffer
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* An convenient structure that contains the buffer size and the buffer
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* pointer. Used to wrap buffer details while doing the I2C data
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* transfer on both input and output. It is the client's responsibility
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* to use i2c_buffer_t_fill to initialize this struct instead of
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@ -118,7 +118,7 @@ int i2c_read(int fd, uint16_t addr, i2c_buffer_t *buf_read);
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*
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* @fd: file descriptor of the target device.
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* @addr: I2C slave address of the target device.
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* @buf_write: data struct includes writting buffer and size.
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* @buf_write: data struct includes writing buffer and size.
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*
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* This function does accept empty write and do nothing on such case.
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*
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@ -271,7 +271,7 @@ static int lspcon_i2c_spi_send_command(const struct flashctx *flash,
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ret |= lspcon_i2c_spi_enable_write_status_register(fd);
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ret |= lspcon_i2c_spi_toggle_register_protection(fd, 1);
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/* First byte of writearr shuld be the command value, followed by the value to write.
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/* First byte of writearr should be the command value, followed by the value to write.
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Read length occupies 4 bit and represents 16 level, thus if read 1 byte,
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read length should be set 0. */
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packet_t packet = {
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10
ni845x_spi.c
10
ni845x_spi.c
@ -146,7 +146,7 @@ static int32 ni845x_spi_open_resource(char *resource_handle, uInt32 *opened_hand
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/**
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* @param serial a null terminated string containing the serial number of the specific device or NULL
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* @return the 0 on successful completition, negative error code on failure
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* @return the 0 on successful completion, negative error code on failure
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*/
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static int ni845x_spi_open(const char *serial, uInt32 *return_handle)
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{
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@ -161,7 +161,7 @@ static int ni845x_spi_open(const char *serial, uInt32 *return_handle)
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tmp = ni845xFindDevice(resource_name, &device_find_handle, &found_devices_count);
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if (tmp != 0) {
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// supress warning if no device found
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// suppress warning if no device found
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if (tmp != NI845x_FIND_DEVICE_NO_DEVICE_FOUND)
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ni845x_report_error("ni845xFindDevice", tmp);
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return -1;
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@ -214,7 +214,7 @@ _close_ret:
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* @param requested_io_voltage_mV the desired IO voltage in mVolts
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* @param set_io_voltage_mV the IO voltage which was set in mVolts
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* @param coerce_mode if set to USE_LOWER the closest supported IO voltage which is lower or equal to
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* the requested_io_voltage_mV will be selected. Otherwise the next closest supported voltage will be choosen
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* the requested_io_voltage_mV will be selected. Otherwise the next closest supported voltage will be chosen
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* which is higher or equal to the requested_io_voltage_mV.
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* @return 0 on success, negative on error, positive on warning
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*/
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@ -340,7 +340,7 @@ static void ni845x_spi_print_available_devices(void)
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tmp = ni845xFindDevice(resource_handle, &device_find_handle, &found_devices_count);
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if (tmp != 0) {
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// supress warning if no device found
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// suppress warning if no device found
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if (tmp != NI845x_FIND_DEVICE_NO_DEVICE_FOUND)
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ni845x_report_error("ni845xFindDevice", tmp);
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return;
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@ -517,7 +517,7 @@ static int ni845x_spi_transmit(const struct flashctx *flash,
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if (read_cnt != 0 && read_arr != NULL) {
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if ((read_cnt + write_cnt) != read_size) {
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msg_perr("%s: expected and returned read count mismatch: %u expected, %ld recieved\n",
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msg_perr("%s: expected and returned read count mismatch: %u expected, %ld received\n",
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__func__, read_cnt, read_size);
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free(transfer_buffer);
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return -1;
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4
s25f.c
4
s25f.c
@ -17,7 +17,7 @@
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/*
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* s25f.c - Helper functions for Spansion S25FL and S25FS SPI flash chips.
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* Uses 24 bit addressing for the FS chips and 32 bit addressing for the FL
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* chips (which is required by the overlayed sector size devices).
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* chips (which is required by the overlaid sector size devices).
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* TODO: Implement fancy hybrid sector architecture helpers.
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*/
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@ -368,7 +368,7 @@ int probe_spi_big_spansion(struct flashctx *flash)
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* 04h 00h FS: 256-kB physical sectors
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* 04h 01h FS: 64-kB physical sectors
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* 04h 00h FL: 256-kB physical sectors
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* 04h 01h FL: Mix of 64-kB and 4KB overlayed sectors
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* 04h 01h FL: Mix of 64-kB and 4KB overlaid sectors
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* 05h 80h FL family
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* 05h 81h FS family
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*
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&actual_length,
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USB_TIMEOUT_IN_MS);
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if (rc != LIBUSB_TRANSFER_COMPLETED || (unsigned int)actual_length != read_cnt) {
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msg_perr("Failed to retrive the STLINK_BRIDGE_READ_SPI answer: '%s'\n",
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msg_perr("Failed to retrieve the STLINK_BRIDGE_READ_SPI answer: '%s'\n",
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libusb_error_name(rc));
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goto transmit_err;
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}
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@ -88,7 +88,7 @@ pub fn construct_layout_file<F: Write>(mut target: F, ls: &LayoutSizes) -> std::
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}
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pub fn toggle_hw_wp(dis: bool) -> Result<(), String> {
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// The easist way to toggle the harware write-protect is
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// The easist way to toggle the hardware write-protect is
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// to {dis}connect the battery (and/or open the WP screw).
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let s = if dis { "dis" } else { "" };
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info!("Prompt for hardware WP {}able", s);
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@ -312,7 +312,7 @@ LOGS="logs"
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# Setup temporary working directories:
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# LOCAL_TMPDIR: Working directory on local host.
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# REMOTE_TMPDIR: Working directory on remote host.
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# TMPDIR: The temporary directy in which we do most of the work. This is
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# TMPDIR: The temporary directory in which we do most of the work. This is
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# convenient for commands that depend on $DO_REMOTE.
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LOCAL_TMPDIR=$(mktemp -d --tmpdir flashrom_test.XXXXXXXX)
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if [ $? -ne 0 ] ; then
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@ -827,7 +827,7 @@ partial_write_test()
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return $EXIT_SUCCESS
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}
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# Before anything else, check to see if Flashrom can succesfully probe
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# Before anything else, check to see if Flashrom can successfully probe
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# for and find the flash chips. If not, we will abort.
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flashrom_log_scmd $DO_REMOTE "$NEW_FLASHROM $PRIMARY_OPTS" "verify_probe"
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if [ $? -ne 0 ]; then
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