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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 22:43:17 +02:00

Global cleanup: Fix a few spelling errors

Just a trivial patch to fix a few errors found by codespell.

Here's the command I used:
codespell -S subprojects,out \
-L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62840
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth
2022-03-15 10:55:25 -06:00
committed by Anastasia Klimchuk
parent 005aa915a0
commit 0f388acaba
15 changed files with 26 additions and 26 deletions

View File

@ -501,7 +501,7 @@ contents (using
and store it to a medium outside of your computer, like
a USB drive or a network share. If you needed to run the board enable code
already for probing, use it for reading too.
If reading succeeds and the contens of the read file look legit you can try to write the new image.
If reading succeeds and the contents of the read file look legit you can try to write the new image.
You should enable the board enable code in any case now, as it
has been written because it is known that writing/erasing without the board
enable is going to fail. In any case (success or failure), please report to
@ -927,7 +927,7 @@ correspondingly. Example:
.sp
The parameter
.B gpiolX=[HLC]
allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as addtional CS#
allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as additional CS#
signal, where
.B X
can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly. The parameter may be specified