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flashchips: add GD25LB512ME

Added GD25LB512ME to Flashchips.C
added Sames as GD25LB512ME to GIGADEVICE_GD25LR512ME to flashchips.h

GD25LB512ME is 1.8V 512Mbit, Quad enabled when shipped.
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00580-GD25LB512ME-Rev1.5.pdf

Tested on ch347 with erase, program, read, and protection.

Change-Id: I04103814f901478098c1a989f4239792b64073ec
Signed-off-by: Victor Lim <vlim@gigadevice.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83795
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Victor 2024-08-06 23:33:30 -07:00 committed by Anastasia Klimchuk
parent 9c3aed0269
commit 126de26b44
2 changed files with 3 additions and 3 deletions

View File

@ -7068,7 +7068,7 @@ const struct flashchip flashchips[] = {
{
.vendor = "GigaDevice",
.name = "GD25LR512ME",
.name = "GD25LB512ME/GD25LR512ME",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
.model_id = GIGADEVICE_GD25LR512ME,
@ -7076,7 +7076,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 4096B total; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA,
.tested = TEST_OK_PREW,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =

View File

@ -407,7 +407,7 @@
#define GIGADEVICE_GD25LF128E 0x6318
#define GIGADEVICE_GD25LF256F 0x6319
#define GIGADEVICE_GD25LR256E 0x6719
#define GIGADEVICE_GD25LR512ME 0x671A
#define GIGADEVICE_GD25LR512ME 0x671A /* Same as GD25LB512ME */
#define GIGADEVICE_GD25WQ80E 0x6514
#define GIGADEVICE_GD29GL064CAB 0x7E0601