mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-26 14:42:36 +02:00
Some ISO C fixes
This patch just fixes a limited number of bits not conforming to c99 by using - __asm__ instead of just asm - {0} instead of {} for struct initialization - h_addr_list[0] instead of h_addr to access the host address in struct hostent - #include <strings.h> where needed (for ffs and strcasecmp) Based on a previous patch by Carl-Daniel. Corresponding to flashrom svn r1585. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
parent
6745d6f39d
commit
1c6d2ff03d
2
atahpt.c
2
atahpt.c
@ -38,7 +38,7 @@ const struct pcidev_status ata_hpt[] = {
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{0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
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{0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
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{},
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{0},
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};
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static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
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@ -24,6 +24,7 @@
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* Contains the board specific flash enables.
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*/
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#include <strings.h>
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#include <string.h>
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#include <stdlib.h>
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#include "flash.h"
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@ -292,7 +293,7 @@ static uint8_t w836xx_deviceid_hwmon(uint16_t sio_port)
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void probe_superio_winbond(void)
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{
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struct superio s = {};
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struct superio s = {0};
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uint16_t winbond_ports[] = {WINBOND_SUPERIO_PORT1, WINBOND_SUPERIO_PORT2, 0};
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uint16_t *i = winbond_ports;
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uint8_t model;
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@ -18,6 +18,7 @@
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*/
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#include <stdio.h>
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#include <strings.h>
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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@ -25,6 +25,7 @@
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#include <unistd.h>
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#include <stdio.h>
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#include <ctype.h>
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#include <strings.h>
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#include <string.h>
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#include "flash.h"
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#include "programmer.h"
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@ -1466,7 +1466,7 @@ const struct penable chipset_enables[] = {
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{0x8086, 0x8c5e, NT, "Intel", "Lynx Point", enable_flash_pch8},
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{0x8086, 0x8c5f, NT, "Intel", "Lynx Point", enable_flash_pch8},
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#endif
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{},
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{0},
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};
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int chipset_flash_enable(void)
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1
dmi.c
1
dmi.c
@ -18,6 +18,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <strings.h>
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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@ -35,7 +35,8 @@
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const struct pcidev_status drkaiser_pcidev[] = {
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{0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
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{},
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{0},
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};
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static uint8_t *drkaiser_bar;
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@ -61,7 +62,7 @@ static int drkaiser_shutdown(void *data)
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/* Flash write is disabled automatically by PCI restore. */
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pci_cleanup(pacc);
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return 0;
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};
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}
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int drkaiser_init(void)
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{
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@ -9496,7 +9496,7 @@ const struct flashchip flashchips[] = {
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.unlock = spi_disable_blockprotect, /* is this safe? */
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.read = spi_chip_read,
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/* FIXME: some vendor extensions define this */
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.voltage = {},
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.voltage = {0},
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/* Everything below will be set by the probing function. */
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.write = NULL,
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.total_size = 0,
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@ -263,7 +263,7 @@ const struct programmer_entry programmer_table[] = {
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},
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#endif
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{}, /* This entry corresponds to PROGRAMMER_INVALID. */
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{0}, /* This entry corresponds to PROGRAMMER_INVALID. */
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};
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#define SHUTDOWN_MAXFN 32
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@ -21,6 +21,7 @@
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#if CONFIG_FT2232_SPI == 1
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#include <stdio.h>
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#include <strings.h>
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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@ -61,7 +62,8 @@ const struct usbdev_status devs_ft2232spi[] = {
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{OLIMEX_VID, OLIMEX_ARM_TINY_PID, OK, "Olimex", "ARM-USB-TINY"},
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{OLIMEX_VID, OLIMEX_ARM_OCD_H_PID, NT, "Olimex", "ARM-USB-OCD-H"},
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{OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, NT, "Olimex", "ARM-USB-TINY-H"},
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{},
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{0},
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};
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@ -59,7 +59,7 @@ const struct pcidev_status gfx_nvidia[] = {
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{0x10de, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" },
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{0x10de, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" },
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{},
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{0},
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};
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static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
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@ -97,7 +97,7 @@ static inline void sync_primitive(void)
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* Such reordering and/or merging would break device accesses which
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* depend on the exact access order.
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*/
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asm("eieio" : : : "memory");
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___asm___ volatile ("eieio" : : : "memory");
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}
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/* PCI port I/O is not yet implemented on PowerPC. */
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13
hwaccess.h
13
hwaccess.h
@ -174,7 +174,6 @@ cpu_to_be(64)
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/* for iopl and outb under Solaris */
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#if defined (__sun) && (defined(__i386) || defined(__amd64))
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#include <strings.h>
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#include <sys/sysi86.h>
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#include <sys/psw.h>
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#include <asm/sunddi.h>
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@ -263,37 +262,37 @@ cpu_to_be(64)
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static inline void outb(uint8_t value, uint16_t port)
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{
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asm volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
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__asm__ volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
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}
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static inline uint8_t inb(uint16_t port)
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{
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uint8_t value;
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asm volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
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__asm__ volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
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return value;
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}
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static inline void outw(uint16_t value, uint16_t port)
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{
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asm volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
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__asm__ volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
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}
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static inline uint16_t inw(uint16_t port)
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{
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uint16_t value;
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asm volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
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__asm__ volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
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return value;
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}
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static inline void outl(uint32_t value, uint16_t port)
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{
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asm volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
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__asm__ volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
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}
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static inline uint32_t inl(uint16_t port)
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{
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uint32_t value;
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asm volatile ("inl %1,%0":"=a" (value):"Nd" (port));
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__asm__ volatile ("inl %1,%0":"=a" (value):"Nd" (port));
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return value;
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}
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#endif
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@ -18,6 +18,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <strings.h>
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#include <string.h>
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#include <stdlib.h>
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#include "flash.h"
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@ -74,7 +74,7 @@ uint16_t probe_id_ite(uint16_t port)
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void probe_superio_ite(void)
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{
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struct superio s = {};
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struct superio s = {0};
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uint16_t ite_ports[] = {ITE_SUPERIO_PORT1, ITE_SUPERIO_PORT2, 0};
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uint16_t *i = ite_ports;
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@ -53,7 +53,7 @@ const struct pcidev_status nics_3com[] = {
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/* 3C980C */
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{0x10b7, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" },
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{},
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{0},
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};
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static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
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@ -31,7 +31,7 @@ const struct pcidev_status nics_intel[] = {
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{PCI_VENDOR_ID_INTEL, 0x1209, NT, "Intel", "8255xER/82551IT Fast Ethernet Controller"},
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{PCI_VENDOR_ID_INTEL, 0x1229, OK, "Intel", "82557/8/9/0/1 Ethernet Pro 100"},
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{},
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{0},
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};
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/* Arbitrary limit, taken from the datasheet I just had lying around.
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@ -73,7 +73,7 @@ const struct pcidev_status nics_intel_spi[] = {
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{PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"},
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{PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"},
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{},
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{0},
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};
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static void nicintel_request_spibus(void)
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@ -33,7 +33,8 @@
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const struct pcidev_status nics_natsemi[] = {
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{0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"},
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{0x100b, 0x0022, NT, "National Semiconductor", "DP83820"},
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{},
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{0},
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};
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static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
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@ -34,7 +34,8 @@
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const struct pcidev_status nics_realtek[] = {
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{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
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{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
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{},
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{0},
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};
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static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,
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@ -18,6 +18,7 @@
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*/
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#include <stdlib.h>
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#include <strings.h>
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#include <string.h>
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#include "flash.h"
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#include "programmer.h"
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@ -48,7 +49,8 @@ static uint32_t ogp_reg_sck;
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const struct pcidev_status ogp_spi[] = {
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{PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"},
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{},
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{0},
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};
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static void ogp_request_spibus(void)
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@ -22,6 +22,7 @@
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*/
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#include <stdlib.h>
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#include <strings.h>
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#include <string.h>
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#include "flash.h"
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4
print.c
4
print.c
@ -1033,7 +1033,7 @@ const struct board_info boards_known[] = {
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B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL),
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#endif
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{},
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{0},
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};
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/* Please keep this list alphabetically ordered by vendor/board. */
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@ -1059,6 +1059,6 @@ const struct board_info laptops_known[] = {
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B("Lenovo", "3000 V100 TF05Cxx", OK, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
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#endif
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{},
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{0},
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};
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#endif
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@ -31,6 +31,7 @@
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#if defined(__i386__) || defined(__x86_64__)
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#include <stdlib.h>
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#include <strings.h>
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#include <string.h>
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#include "flash.h"
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#include "programmer.h"
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2
satamv.c
2
satamv.c
@ -33,7 +33,7 @@ const struct pcidev_status satas_mv[] = {
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/* 88SX6041 and 88SX6042 are the same according to the datasheet. */
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{0x11ab, 0x7042, OK, "Marvell", "88SX7042 PCI-e 4-port SATA-II"},
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{},
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{0},
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};
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#define NVRAM_PARAM 0x1045c
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@ -38,7 +38,7 @@ const struct pcidev_status satas_sii[] = {
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{0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
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{0x1095, 0x3512, OK, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
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{},
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{0},
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};
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static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
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@ -22,6 +22,7 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <strings.h>
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#include <string.h>
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#include <ctype.h>
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#include <fcntl.h>
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@ -125,7 +126,7 @@ static int sp_opensocket(char *ip, unsigned int port)
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}
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sp.si.sin_family = AF_INET;
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sp.si.sin_port = htons(port);
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(void)memcpy(&sp.si.sin_addr, hostPtr->h_addr, hostPtr->h_length);
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(void)memcpy(&sp.si.sin_addr, hostPtr->h_addr_list[0], hostPtr->h_length);
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if (connect(sock, &sp.s, sizeof(sp.si)) < 0) {
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close(sock);
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msg_perr("Error: serprog cannot connect: %s\n", strerror(errno));
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