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tree/: Replace NULL-case of programmer_delay() with internal_delay

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Replace `programmer_delay(NULL, [..])` calls with direct
`internal_delay([..])` dispatches explicitly. Custom driver
delays remain hooked as well as core flashrom logic. The
NULL base case of 'programmer_delay()' then becomes a condition
to validate for layering violations or invalid flash contexts.

Change-Id: I1da230804d5e8f47a6e281feb66f381514dc6861
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68434
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Edward O'Callaghan 2022-10-17 12:31:59 +11:00 committed by Edward O'Callaghan
parent 78e421bdf7
commit 1e01eefcba
12 changed files with 44 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
amd_imc.c
View File

@ -60,7 +60,7 @@ static int mbox_wait_ack(uint16_t mbox_port)
msg_pwarn("IMC MBOX: Timeout!\n");
return 1;
}
programmer_delay(NULL, 1000);
internal_delay(1000);
}
return 0;
}

4
atavia.c
View File

@ -90,7 +90,7 @@ static bool atavia_ready(struct pci_dev *pcidev_dev)
ready = true;
break;
} else {
programmer_delay(NULL, 1);
internal_delay(1);
continue;
}
}
@ -170,7 +170,7 @@ static int atavia_init(const struct programmer_cfg *cfg)
/* Test if a flash chip is attached. */
pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK);
programmer_delay(NULL, 90);
internal_delay(90);
uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS);
msg_pdbg2("BROM base=0x%08x\n", base);
if ((base & PCI_ROM_ADDRESS_MASK) == 0) {

12
bitbang_spi.c
View File

@ -76,10 +76,10 @@ static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master, vo
bitbang_spi_set_sck_set_mosi(master, 0, 0, spi_data);
else
bitbang_spi_set_sck(master, 0, spi_data);
programmer_delay(NULL, master->half_period);
internal_delay(master->half_period);
ret <<= 1;
ret |= bitbang_spi_set_sck_get_miso(master, 1, spi_data);
programmer_delay(NULL, master->half_period);
internal_delay(master->half_period);
}
return ret;
}
@ -90,9 +90,9 @@ static void bitbang_spi_write_byte(const struct bitbang_spi_master *master, uint
for (i = 7; i >= 0; i--) {
bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1, spi_data);
programmer_delay(NULL, master->half_period);
internal_delay(master->half_period);
bitbang_spi_set_sck(master, 1, spi_data);
programmer_delay(NULL, master->half_period);
internal_delay(master->half_period);
}
}
@ -122,9 +122,9 @@ static int bitbang_spi_send_command(const struct flashctx *flash,
readarr[i] = bitbang_spi_read_byte(master, data->spi_data);
bitbang_spi_set_sck(master, 0, data->spi_data);
programmer_delay(NULL, master->half_period);
internal_delay(master->half_period);
bitbang_spi_set_cs(master, 1, data->spi_data);
programmer_delay(NULL, master->half_period);
internal_delay(master->half_period);
/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
bitbang_spi_release_bus(master, data->spi_data);

4
dediprog.c
View File

@ -316,7 +316,7 @@ static int dediprog_set_spi_voltage(libusb_device_handle *dediprog_handle, int m
if (voltage_selector == 0) {
/* Wait some time as the original driver does. */
programmer_delay(NULL, 200 * 1000);
internal_delay(200 * 1000);
}
ret = dediprog_write(dediprog_handle, CMD_SET_VCC, voltage_selector, 0, NULL, 0);
if (ret != 0x0) {
@ -326,7 +326,7 @@ static int dediprog_set_spi_voltage(libusb_device_handle *dediprog_handle, int m
}
if (voltage_selector != 0) {
/* Wait some time as the original driver does. */
programmer_delay(NULL, 200 * 1000);
internal_delay(200 * 1000);
}
return 0;
}

2
dummyflasher.c
View File

@ -897,7 +897,7 @@ static int dummy_spi_send_command(const struct flashctx *flash, unsigned int wri
msg_pspew(" 0x%02x", readarr[i]);
msg_pspew("\n");
programmer_delay(NULL, (writecnt + readcnt) * emu_data->delay_us);
internal_delay((writecnt + readcnt) * emu_data->delay_us);
return 0;
}

14
flashrom.c
View File

@ -259,8 +259,20 @@ void programmer_delay(const struct flashctx *flash, unsigned int usecs)
if (usecs == 0)
return;
if (!flash)
/**
* Drivers should either use internal_delay() directly or their
* own custom delay. Only core flashrom logic calls programmer_delay()
* which should always have a valid flash context. A NULL context
* more than likely indicates a layering violation or BUG however
* for now dispatch a internal_delay() as a safe default for the NULL
* base case.
*/
if (!flash) {
msg_perr("%s called with NULL flash context. "
"Please report a bug at flashrom@flashrom.org\n",
__func__);
return internal_delay(usecs);
}
if (flash->mst->buses_supported & BUS_SPI) {
if (flash->mst->spi.delay)

10
ichspi.c
View File

@ -875,7 +875,7 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset,
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */
while ((REGREAD16(ICH7_REG_SPIS) & SPIS_SCIP) && --timeout) {
programmer_delay(NULL, 10);
internal_delay(10);
}
if (!timeout) {
msg_perr("Error: SCIP never cleared!\n");
@ -951,7 +951,7 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset,
/* Wait for Cycle Done Status or Flash Cycle Error. */
while (((REGREAD16(ICH7_REG_SPIS) & (SPIS_CDS | SPIS_FCERR)) == 0) &&
--timeout) {
programmer_delay(NULL, 10);
internal_delay(10);
}
if (!timeout) {
msg_perr("timeout, ICH7_REG_SPIS=0x%04x\n", REGREAD16(ICH7_REG_SPIS));
@ -991,7 +991,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */
while ((REGREAD8(swseq_data.reg_ssfsc) & SSFS_SCIP) && --timeout) {
programmer_delay(NULL, 10);
internal_delay(10);
}
if (!timeout) {
msg_perr("Error: SCIP never cleared!\n");
@ -1071,7 +1071,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
/* Wait for Cycle Done Status or Flash Cycle Error. */
while (((REGREAD32(swseq_data.reg_ssfsc) & (SSFS_FDONE | SSFS_FCERR)) == 0) &&
--timeout) {
programmer_delay(NULL, 10);
internal_delay(10);
}
if (!timeout) {
msg_perr("timeout, REG_SSFS=0x%08x\n", REGREAD32(swseq_data.reg_ssfsc));
@ -1319,7 +1319,7 @@ static int ich_hwseq_wait_for_cycle_complete(unsigned int len, enum ich_chipset
while ((((hsfs = REGREAD16(ICH9_REG_HSFS)) &
(HSFS_FDONE | HSFS_FCERR)) == 0) &&
--timeout_us) {
programmer_delay(NULL, 8);
internal_delay(8);
}
REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
if (!timeout_us) {

2
it87spi.c
View File

@ -146,7 +146,7 @@ static int it8716f_spi_page_program(struct flashctx *flash, const uint8_t *buf,
if((status & SPI_SR_WIP) == 0)
return 0;
programmer_delay(NULL, 1000);
internal_delay(1000);
}
return 0;
}

8
nicintel_eeprom.c
View File

@ -213,7 +213,7 @@ static int nicintel_ee_write_word_i210(uint8_t *eebar, unsigned int addr, uint16
eewr |= BIT(EEWR_CMDV);
pci_mmio_writel(eewr, eebar + EEWR);
programmer_delay(NULL, 5);
internal_delay(5);
int i;
for (i = 0; i < MAX_ATTEMPTS; i++)
if (pci_mmio_readl(eebar + EEWR) & BIT(EEWR_DONE))
@ -338,7 +338,7 @@ static int nicintel_ee_ready(uint8_t *eebar)
nicintel_ee_bitbang(eebar, 0x00, &rdsr);
nicintel_ee_bitset(eebar, EEC, EE_CS, 1);
programmer_delay(NULL, 1);
internal_delay(1);
if (!(rdsr & SPI_SR_WIP)) {
return 0;
}
@ -379,7 +379,7 @@ static int nicintel_ee_write_82580(struct flashctx *flash, const uint8_t *buf, u
nicintel_ee_bitset(eebar, EEC, EE_CS, 0);
nicintel_ee_bitbang(eebar, JEDEC_WREN, NULL);
nicintel_ee_bitset(eebar, EEC, EE_CS, 1);
programmer_delay(NULL, 1);
internal_delay(1);
/* data */
nicintel_ee_bitset(eebar, EEC, EE_CS, 0);
@ -394,7 +394,7 @@ static int nicintel_ee_write_82580(struct flashctx *flash, const uint8_t *buf, u
break;
}
nicintel_ee_bitset(eebar, EEC, EE_CS, 1);
programmer_delay(NULL, 1);
internal_delay(1);
if (nicintel_ee_ready(eebar))
goto out;
}

2
pony_spi.c
View File

@ -244,7 +244,7 @@ static int pony_spi_init(const struct programmer_cfg *cfg)
for (i = 1; i <= 10; i++) {
data_out = i & 1;
sp_set_pin(PIN_RTS, data_out);
programmer_delay(NULL, 1000);
internal_delay(1000);
/* If DSR does not change, we are not connected to what we think */
if (data_out != sp_get_pin(PIN_DSR)) {

14
raiden_debug_spi.c
View File

@ -892,7 +892,7 @@ static int send_command_v1(const struct flashctx *flash,
/* Reattempting will not result in a recovery. */
return status;
}
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
continue;
}
@ -927,7 +927,7 @@ static int send_command_v1(const struct flashctx *flash,
/* Reattempting will not result in a recovery. */
return status;
}
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
}
}
@ -962,7 +962,7 @@ static int get_spi_config_v2(struct raiden_debug_spi_data *ctx_data)
" config attempt = %d\n"
" status = 0x%05x\n",
config_attempt + 1, status);
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
continue;
}
@ -972,7 +972,7 @@ static int get_spi_config_v2(struct raiden_debug_spi_data *ctx_data)
" config attempt = %d\n"
" status = 0x%05x\n",
config_attempt + 1, status);
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
continue;
}
@ -1016,7 +1016,7 @@ static int get_spi_config_v2(struct raiden_debug_spi_data *ctx_data)
config_attempt + 1,
rsp_config.packet_v2.packet_id,
rsp_config.packet_size);
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
}
return USB_SPI_HOST_INIT_FAILURE;
}
@ -1240,7 +1240,7 @@ static int send_command_v2(const struct flashctx *flash,
/* Reattempting will not result in a recovery. */
return status;
}
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
continue;
}
for (read_attempt = 0; read_attempt < READ_RETRY_ATTEMPTS;
@ -1277,7 +1277,7 @@ static int send_command_v2(const struct flashctx *flash,
}
/* Device needs to reset its transmit index. */
restart_response_v2(ctx_data);
programmer_delay(NULL, RETRY_INTERVAL_US);
internal_delay(RETRY_INTERVAL_US);
}
}
}

2
wbsio_spi.c
View File

@ -155,7 +155,7 @@ static int wbsio_spi_send_command(const struct flashctx *flash, unsigned int wri
OUTB(writearr[0], data->spibase);
OUTB(mode, data->spibase + 1);
programmer_delay(NULL, 10);
internal_delay(10);
if (!readcnt)
return 0;