mirror of
https://review.coreboot.org/flashrom.git
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Add a bunch of new/tested stuff and various small changes 24
Tested mainboards: OK: - ASRock G31M-GS Reported by Александр Трубицын - ASRock G41M-VS3 Reported by Александр Трубицын - ASRock N68C-S UCC Reported by Alexey Belyaev - ASRock AMCP7AION-HT (ION 330HT(-BD)) Reported by Stefan Tauner - ASUS P5K SE Reported by Александр Трубицын - ASUS P5KPL-VM Reported by Marin Vlah - ASUS RAMPAGE III GENE Reported by stevessss on IRC - GIGABYTE GA-945GM-S2 Reported by Александр Трубицын - GIGABYTE GA-945GCM-S2 (rev. 3.0) Reported by Александр Трубицын - GIGABYTE GA-965P-S3 Reported by Александр Трубицын - GIGABYTE GA-EG43M-S2H Reported by Александр Трубицын - GIGABYTE GA-EP31-DS3L (rev. 1.0) Reported by Александр Трубицын - GIGABYTE GA-G33M-S2 Reported by Александр Трубицын - GIGABYTE GA-G33M-S2L Reported by Александр Трубицын - GIGABYTE GA-H55M-S2 Reported by Александр Трубицын - GIGABYTE GA-J1900N-D3V Reported by Marcos Truchado and Guillermo von Hünefeld - GIGABYTE GA-K8NS Reported by nicolae788 - GIGABYTE GA-M56S-S3 Reported by Estevo Paz Freire - GIGABYTE GA-P31-DS3L Reported by Александр Трубицын - GIGABYTE GA-P31-S3G Reported by Александр Трубицын - MSI MS-7336 Reported by Benjamin Bellec - MSI X79A-GD45 (8D) (MS-7760)" Reported by mortehu on IRC - Supermicro A1SAi-2550F Reported by Bernard Grymonpon - Supermicro X7DWT Reported by Steven Stremciuc Laptop: - ASUS U38N Reported by Ultra on IRC - Dell Latitude D630 Reported by Márton Miklós - Fujitsu Amilo Xi 3650 Reported by Elmar Stellnberger - Lenovo T400 (whitelisting only) Chipsets: - Mark 8086:1f38 (Intel Avoton/Rangeley) as tested Reported by Jeremy Porter and Bernard Grymonpon - Add Intel Sunrise Point IDs but no support yet. Flash chips: - Atmel AT45DB321D to PREW (+PREW) Reported by The Raven - Eon EN25QH32 to PREW (+PREW) Reported by Josua Mayer - Eon EN25QH64 to PREW (+EW) Reported by David s. Alessio - GigaDevice GD25LQ64(B) to PREW (+PREW) Reported by Greg Tippit - Intel 28F001BN/BX-T to PREW (+EW) Reported by Lu Xie - Micron M25P10-A to PREW (+W) Reported by the Raven - Micron M25PE40 Reported by David Wood - Micron N25Q128..3E to PREW (+PREW) Reported by Miklós Márton - Macronix MX25L3273E to PREW (+PREW) Reported by Roklobsta on IRC - Macronix MX23L6454 to PR (+PR) Reported by Steven Honeyman - Macronix MX25U6435E/F to PREW (+PREW) Reported by Marcos Truchado and Guillermo von Hünefeld - PMC Pm25LQ032C to PREW (+EW) Reported by Dirk Knop - Spansion S25FL016A to PREW (+EW) Reported by Márton Miklós - Spansion S25FL128S......0 to PREW (+PREW) Reported by Jim Houston - Spansion S25FL204K to PR (+PR) Reported by Thomas Debrunner - SST SST49LF016C to PREW (+EW) Reported by Steven Stremciuc - SST SST39VF040 to PREW (+PREW) Reported by Xavier Bourgeois - SST SST49LF040B to PREW (+EW) Reported by Rikard Åhlund - ST M25P10-A to PREW (+W) Reported by Martijn Schiedon - Winbond W39V040FA to PREW (+EW) Reported by Евгений Черкашин - Winbond W39V080FA to PREW (+EW) Reported by protagonist0 on IRC - Winbond W25Q80.W to PREW (+PREW) Reported by Miklós Márton - Winbond W25X64 to PREW (+REW) Reported by Johannes Krampf and Manuel Dejonghe - Fix ID of AMIC A25LQ64 Reported by Roman Titov - Fix page size of Spansion S25FL129P......1 Copy and paste error from the 128S uniform 256kB variant, probably. - Add Micron/Numonyx phase-change memory IDs Miscellaneous: - Detect Android target OS. No changes are required to build flashrom (excluding programmers with NEED_PCI) on Android. - Update rayerspi (spipgm) URL - Fix max_data_write handling of at45db. - Minor refinement of the README - Mark board enable for the GA-K8NS variants as tested. Tested by "nicolae788" on a board with socket 754. - Mark "Multi-system" chassis as non-laptop case. - Remove W836xx log requests. We got enough (and no one is looking at them for the time being anyway). - serprog: improve invalid reply error message, contributed by Urja Rannikko. - Remove default include paths for MinGW. - Disable implicit rules in the Makefile because we don't need them and they just make the build (imperceptibly) slower. - Enable our own strnlen() implementation not only on DJGPP but also if HAVE_STRNLEN is not defined. This is needed to get older BSDs (e.g. NetBSD 6.0, FreeBSD < 8.0) to work. - Tiny other stuff. Corresponding to flashrom svn r1917. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner
parent
c2644a3fc1
commit
23e10b8780
8
Makefile
8
Makefile
@ -186,11 +186,8 @@ EXEC_SUFFIX := .exe
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# MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs().
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FLASHROM_CFLAGS += -Dffs=__builtin_ffs
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# Some functions provided by Microsoft do not work as described in C99 specifications. This macro fixes that
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# for MinGW. See http://sourceforge.net/apps/trac/mingw-w64/wiki/printf%20and%20scanf%20family */
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# for MinGW. See http://sourceforge.net/p/mingw-w64/wiki2/printf%20and%20scanf%20family/ */
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FLASHROM_CFLAGS += -D__USE_MINGW_ANSI_STDIO=1
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# libusb-win32/libftdi stuff is usually installed in /usr/local.
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CPPFLAGS += -I/usr/local/include
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LDFLAGS += -L/usr/local/lib
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# For now we disable all PCI-based programmers on Windows/MinGW (no libpci).
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ifeq ($(CONFIG_INTERNAL), yes)
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UNSUPPORTED_FEATURES += CONFIG_INTERNAL=yes
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@ -1126,4 +1123,7 @@ libpayload: clean
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.PHONY: all install clean distclean compiler hwlibs features export tarball djgpp-dos featuresavailable libpayload
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# Disable implicit suffixes and built-in rules (for performance and profit)
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.SUFFIXES:
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-include $(OBJS:.o=.d)
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11
README
11
README
@ -8,12 +8,13 @@ in-system using a supported mainboard, but it also supports flashing of network
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cards (NICs), SATA controller cards, and other external devices which can
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program flash chips.
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It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40
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chips, which use various protocols such as LPC, FWH, parallel flash, or SPI.
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It supports a wide range of flash chips (most commonly found in SOIC8, DIP8,
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SOIC16, WSON8, PLCC32, DIP32, TSOP32, and TSOP40 packages), which use various
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protocols such as LPC, FWH, parallel flash, or SPI.
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Do not use flashrom on laptops! The embedded controller (EC) present in many
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laptops interacts badly with any flash attempts and can brick your laptop
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permanently.
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Do not use flashrom on laptops (yet)! The embedded controller (EC) present in
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many laptops might interact badly with any attempts to communicate with the
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flash chip and may brick your laptop.
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Please make a backup of your flash chip before writing to it.
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10
at45db.c
10
at45db.c
@ -99,6 +99,10 @@ static unsigned int at45db_get_sector_count(struct flashctx *flash)
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static uint8_t at45db_prettyprint_protection_register(struct flashctx *flash, uint8_t opcode, const char *regname)
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{
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const uint8_t cmd[] = { opcode, 0, 0, 0 };
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const size_t sec_count = at45db_get_sector_count(flash);
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if (sec_count < 2)
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return 0;
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/* The first two sectors share the first result byte. */
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uint8_t buf[at45db_get_sector_count(flash) - 1];
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@ -332,7 +336,7 @@ static int at45db_erase(struct flashctx *flash, uint8_t opcode, unsigned int at4
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/* Wait for completion. */
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ret = at45db_wait_ready(flash, stepsize, retries);
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if (ret != 0)
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msg_cerr("%s: chip did not became ready again after sending the erase command!\n", __func__);
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msg_cerr("%s: chip did not become ready again after sending the erase command!\n", __func__);
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return ret;
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}
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@ -463,7 +467,7 @@ static int at45db_fill_buffer1(struct flashctx *flash, const uint8_t *bytes, uns
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}
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/* Create a suitable buffer to store opcode, address and data chunks for buffer1. */
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const unsigned int max_data_write = flash->mst->spi.max_data_write;
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const int max_data_write = flash->mst->spi.max_data_write - 4;
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const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ?
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max_data_write : page_size;
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uint8_t buf[4 + max_chunk];
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@ -504,7 +508,7 @@ static int at45db_commit_buffer1(struct flashctx *flash, unsigned int at45db_add
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/* Wait for completion (typically a few ms). */
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ret = at45db_wait_ready(flash, 250, 200); // 50 ms
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if (ret != 0) {
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msg_cerr("%s: chip did not became ready again!\n", __func__);
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msg_cerr("%s: chip did not become ready again!\n", __func__);
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return ret;
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}
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@ -333,12 +333,9 @@ void probe_superio_winbond(void)
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continue;
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}
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}
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msg_pinfo("Active config mode, unknown reg 0x20 ID: %02x.\n", model);
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msg_pinfo("Please send the output of \"flashrom -V -p internal\" to \n"
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"flashrom@flashrom.org with W836xx: your board name: flashrom -V\n"
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"as the subject to help us finish support for your Super I/O. Thanks.\n");
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msg_pdbg("Active config mode, unknown reg 0x20 ID: %02x.\n", model);
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continue;
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}
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}
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/* The Super I/O reacts to W836xx enter and exit config mode, it's probably Winbond. */
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w836xx_ext_enter(s.port);
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s.model = sio_read(s.port, 0x20);
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@ -1156,6 +1153,7 @@ static int nvidia_mcp_gpio8_raise(void)
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/*
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* Suited for:
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* - GIGABYTE GA-K8NS Pro-939: Socket 939 + NVIDIA nForce3 + CK8
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* - Probably other versions of the GA-K8NS
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*/
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static int nvidia_mcp_gpio0a_raise(void)
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{
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@ -2387,8 +2385,10 @@ const struct board_match board_matches[] = {
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{0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise},
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{0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^CUSL2-C", NULL, NULL, P3, "ASUS", "CUSL2-C", 0, OK, intel_ich_gpio21_raise},
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{0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^TUSL2-C", NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise},
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{0x1022, 0x780E, 0x1043, 0x1437, 0x1022, 0x780B, 0x1043, 0x1437, "^U38N$", NULL, NULL, P2, "ASUS", "U38N", 0, OK, p2_whitelist_laptop},
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{0x1106, 0x3059, 0x1106, 0x4161, 0x1106, 0x3065, 0x1106, 0x0102, NULL, NULL, NULL, P3, "Bcom/Clientron", "WinNET P680", 0, OK, w836xx_memw_enable_2e},
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{0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e},
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{0x8086, 0x283e, 0x1028, 0x01f9, 0x8086, 0x2a01, 0, 0, "^Latitude D630", NULL, NULL, P2, "Dell", "Latitude D630", 0, OK, p2_whitelist_laptop},
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{0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower},
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{0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise},
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{0x1106, 0x3189, 0x1106, 0x3189, 0x1106, 0x3177, 0x1106, 0x3177, "^AD77", "dfi", "ad77", P3, "DFI", "AD77", 0, NT, w836xx_memw_enable_2e},
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@ -2401,6 +2401,7 @@ const struct board_match board_matches[] = {
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{0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, P3, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise},
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{0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", P3, "EPoX", "EP-BX3", 0, NT, intel_piix4_gpo22_raise},
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{0x10de, 0x02f0, 0x105b, 0x0d01, 0x10de, 0x0264, 0x105b, 0x0d01, NULL, NULL, NULL, P3, "Foxconn", "6150K8MD-8EKRSH", 0, NT, nvidia_mcp_gpio2_raise},
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{0x8086, 0x2A40, 0x1734, 0x1148, 0x8086, 0x2930, 0x1734, 0x1148, "^XY680", NULL, NULL, P2, "Fujitsu", "Amilo Xi 3650", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x2443, 0x8086, 0x2442, 0x8086, 0x1130, 0x8086, 0x1130, "^6IEM ", NULL, NULL, P3, "GIGABYTE", "GA-6IEM", 0, NT, intel_ich_gpio25_raise},
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{0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, P3, "GIGABYTE", "GA-7ZM", 512, OK, NULL},
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{0x8086, 0x2570, 0x1458, 0x2570, 0x8086, 0x24d0, 0, 0, "^8IP775/-G$",NULL, NULL, P3, "GIGABYTE", "GA-8IP775", 0, OK, intel_ich_gpio32_raise},
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@ -2410,7 +2411,7 @@ const struct board_match board_matches[] = {
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{0x1039, 0x0651, 0x1039, 0x0651, 0x1039, 0x7002, 0x1458, 0x5004, "^GA-8SIMLH$",NULL, NULL, P3, "GIGABYTE", "GA-8SIMLH", 0, OK, sis_gpio0_raise_and_w836xx_memw},
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{0x10DE, 0x02F1, 0x1458, 0x5000, 0x10DE, 0x0261, 0x1458, 0x5001, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N51GMF", 0, OK, nvidia_mcp_gpio3b_raise},
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{0x10DE, 0x026C, 0x1458, 0xA102, 0x10DE, 0x0260, 0x1458, 0x5001, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N51GMF-9", 0, OK, nvidia_mcp_gpio3b_raise},
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{0x10de, 0x00e4, 0x1458, 0x0c11, 0x10de, 0x00e0, 0x1458, 0x0c11, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8NS Pro-939", 0, NT, nvidia_mcp_gpio0a_raise},
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{0x10DE, 0x00E4, 0x1458, 0x0C11, 0x10DE, 0x00E0, 0x1458, 0x0C11, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8NS", 0, OK, nvidia_mcp_gpio0a_raise},
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{0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise},
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{0x8086, 0x2415, 0x103c, 0x1250, 0x10b7, 0x9200, 0x103c, 0x1247, NULL, NULL, NULL, P3, "HP", "e-Vectra P2706T", 0, OK, board_hp_p2706t},
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{0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1678, 0x103c, 0x703e, NULL, "hp", "dl145_g3", P3, "HP", "ProLiant DL145 G3", 0, OK, board_hp_dl145_g3_enable},
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@ -2426,10 +2427,11 @@ const struct board_match board_matches[] = {
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{0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, P3, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower},
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{0x1022, 0x7468, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e},
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{0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", P3, "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m},
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{0x8086, 0x2917, 0x17AA, 0x20F5, 0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad T400", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T400", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x1E22, 0x17AA, 0x21F6, 0x8086, 0x1E55, 0x17AA, 0x21F6, "^ThinkPad T530", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T530", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x27a0, 0x17aa, 0x2015, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T60", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x27a0, 0x17aa, 0x2017, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T60(s)", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x2917, 0x17AA, 0x20F5, 0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad X200$", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X200", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x2917, 0x17AA, 0x20F5, 0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad X200", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X200", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x3B07, 0x17AA, 0x2166, 0x8086, 0x3B30, 0x17AA, 0x2167, "^Lenovo X201", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X201", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x1E22, 0x17AA, 0x21FA, 0x8086, 0x1E55, 0x17AA, 0x21FA, "^ThinkPad X230", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X230", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x27A0, 0x17AA, 0x2017, 0x8086, 0x27B9, 0x17AA, 0x2009, "^ThinkPad X60", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X60(s)", 0, OK, p2_whitelist_laptop},
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@ -1632,7 +1632,7 @@ const struct penable chipset_enables[] = {
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{0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7},
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{0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7},
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{0x8086, 0x1e5f, DEP, "Intel", "NM70", enable_flash_pch7},
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{0x8086, 0x1f38, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
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{0x8086, 0x1f38, DEP, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
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{0x8086, 0x1f39, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
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{0x8086, 0x1f3a, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
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{0x8086, 0x1f3b, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
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@ -1781,6 +1781,10 @@ const struct penable chipset_enables[] = {
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{0x8086, 0x9cc7, NT, "Intel", "Broadwell Y Premium", enable_flash_pch9},
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{0x8086, 0x9cc9, NT, "Intel", "Broadwell Y Base", enable_flash_pch9},
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{0x8086, 0x9ccb, NT, "Intel", "Broadwell H", enable_flash_pch9},
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{0x8086, 0x9d41, BAD, "Intel", "Sunrise Point (Skylake LP Sample)", NULL},
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{0x8086, 0x9d43, BAD, "Intel", "Sunrise Point (Skylake-U Base)", NULL},
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{0x8086, 0x9d48, BAD, "Intel", "Sunrise Point (Skylake-U Premium)", NULL},
|
||||
{0x8086, 0x9d46, BAD, "Intel", "Sunrise Point (Skylake-Y Premium)", NULL},
|
||||
#endif
|
||||
{0},
|
||||
};
|
||||
@ -1816,6 +1820,10 @@ int chipset_flash_enable(void)
|
||||
chipset_enables[i].device_id);
|
||||
msg_pinfo(".\n");
|
||||
|
||||
if (chipset_enables[i].status == BAD) {
|
||||
msg_perr("ERROR: This chipset is not supported yet.\n");
|
||||
return ERROR_FATAL;
|
||||
}
|
||||
if (chipset_enables[i].status == NT) {
|
||||
msg_pinfo("This chipset is marked as untested. If "
|
||||
"you are using an up-to-date version\nof "
|
||||
@ -1826,8 +1834,7 @@ int chipset_flash_enable(void)
|
||||
"(-V) log.\nThank you!\n");
|
||||
}
|
||||
msg_pinfo("Enabling flash write... ");
|
||||
ret = chipset_enables[i].doit(dev,
|
||||
chipset_enables[i].device_name);
|
||||
ret = chipset_enables[i].doit(dev, chipset_enables[i].device_name);
|
||||
if (ret == NOT_DONE_YET) {
|
||||
ret = -2;
|
||||
msg_pinfo("OK - searching further chips.\n");
|
||||
|
||||
1
dmi.c
1
dmi.c
@ -90,6 +90,7 @@ static const struct {
|
||||
{0x11, 0, "Main Server Chassis"},
|
||||
{0x17, 0, "Rack Mount Chassis"},
|
||||
{0x18, 0, "Sealed-case PC"}, /* used by Supermicro (X8SIE) */
|
||||
{0x19, 0, "Multi-system"}, /* used by Supermicro (X7DWT) */
|
||||
};
|
||||
|
||||
#if CONFIG_INTERNAL_DMI == 1
|
||||
|
||||
@ -376,8 +376,8 @@ int dummy_init(void)
|
||||
/* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does
|
||||
* not match the emulated chip. */
|
||||
if (!stat(emu_persistent_image, &image_stat)) {
|
||||
msg_pdbg("Found persistent image %s, size %li ",
|
||||
emu_persistent_image, (long)image_stat.st_size);
|
||||
msg_pdbg("Found persistent image %s, %jd B ",
|
||||
emu_persistent_image, (intmax_t)image_stat.st_size);
|
||||
if (image_stat.st_size == emu_chip_size) {
|
||||
msg_pdbg("matches.\n");
|
||||
msg_pdbg("Reading %s\n", emu_persistent_image);
|
||||
|
||||
2
flash.h
2
flash.h
@ -260,7 +260,7 @@ void tolower_string(char *str);
|
||||
#ifdef __MINGW32__
|
||||
char* strtok_r(char *str, const char *delim, char **nextp);
|
||||
#endif
|
||||
#if defined(__DJGPP__)
|
||||
#if defined(__DJGPP__) || !defined(HAVE_STRNLEN)
|
||||
size_t strnlen(const char *str, size_t n);
|
||||
#endif
|
||||
|
||||
|
||||
78
flashchips.c
78
flashchips.c
@ -1246,7 +1246,7 @@ const struct flashchip flashchips[] = {
|
||||
.name = "A25LQ64",
|
||||
.bustype = BUS_SPI,
|
||||
.manufacture_id = AMIC_ID_NOPREFIX,
|
||||
.model_id = AMIC_A25LQ032,
|
||||
.model_id = AMIC_A25LQ64,
|
||||
.total_size = 8192,
|
||||
.page_size = 256,
|
||||
/* supports SFDP */
|
||||
@ -2658,7 +2658,7 @@ const struct flashchip flashchips[] = {
|
||||
.block_erase = spi_erase_at45db_block,
|
||||
}, /* Although the datasheets describes sectors (which can be write protected)
|
||||
* there seems to be no erase functions for them.
|
||||
{
|
||||
{
|
||||
.eraseblocks = {
|
||||
{8 * 528, 1},
|
||||
{120 * 528, 1},
|
||||
@ -2688,7 +2688,7 @@ const struct flashchip flashchips[] = {
|
||||
/* does not support EWSR nor WREN and has no writable status register bits whatsoever */
|
||||
/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
|
||||
.feature_bits = FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_at45db,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -4657,7 +4657,7 @@ const struct flashchip flashchips[] = {
|
||||
/* OTP: 512B total; enter 0x3A */
|
||||
/* QPI enable 0x38, disable 0xFF */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -4695,7 +4695,7 @@ const struct flashchip flashchips[] = {
|
||||
/* OTP: 512B total; enter 0x3A */
|
||||
/* QPI enable 0x38, disable 0xFF */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers = {
|
||||
@ -5630,7 +5630,7 @@ const struct flashchip flashchips[] = {
|
||||
.page_size = 256,
|
||||
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -6438,7 +6438,7 @@ const struct flashchip flashchips[] = {
|
||||
.model_id = INTEL_28F001T,
|
||||
.total_size = 128,
|
||||
.page_size = 128 * 1024, /* 112k + 2x4k + 8k */
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_jedec,
|
||||
.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
|
||||
.block_erasers =
|
||||
@ -6821,7 +6821,7 @@ const struct flashchip flashchips[] = {
|
||||
.model_id = MACRONIX_MX23L6454,
|
||||
.total_size = 8192,
|
||||
.page_size = 256,
|
||||
.tested = {.probe = NT, .read = NT, .erase = NA, .write = NA},
|
||||
.tested = {.probe = OK, .read = OK, .erase = NA, .write = NA},
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.write = NULL, /* MX23L6454 is a mask ROM, so it is read-only */
|
||||
@ -7337,7 +7337,7 @@ const struct flashchip flashchips[] = {
|
||||
.page_size = 256,
|
||||
/* OTP: 64B total; enter 0xB1, exit 0xC1 */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -7725,7 +7725,7 @@ const struct flashchip flashchips[] = {
|
||||
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
|
||||
/* QPI enable 0x35, disable 0xF5 (0xFF et al. work too) */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -8354,7 +8354,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 128,
|
||||
.page_size = 256,
|
||||
.feature_bits = FEATURE_WRSR_WREN,
|
||||
.tested = TEST_OK_PRE,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -8737,7 +8737,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 512,
|
||||
.page_size = 256,
|
||||
.feature_bits = FEATURE_WRSR_WREN,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -9031,7 +9031,7 @@ const struct flashchip flashchips[] = {
|
||||
},
|
||||
.printlock = spi_prettyprint_status_register_default_welwip,
|
||||
.unlock = NULL, /* #WP pin write-protects lower 64kB. */
|
||||
.write = spi_chip_write_256, /* Page write (similar to PP but allows 0->1 changes) */
|
||||
.write = spi_chip_write_256, /* Page write supported (similar to PP but allows 0->1 changes) */
|
||||
.read = spi_chip_read, /* Fast read (0x0B) supported */
|
||||
.voltage = {2700, 3600},
|
||||
},
|
||||
@ -9274,7 +9274,7 @@ const struct flashchip flashchips[] = {
|
||||
/* supports SFDP */
|
||||
/* OTP: 64B total; read 0x4B, write 0x42 */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers = {
|
||||
@ -10069,7 +10069,7 @@ const struct flashchip flashchips[] = {
|
||||
.page_size = 256,
|
||||
/* OTP: 64B total; read 0x4B, write 0xB1 */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -10658,10 +10658,10 @@ const struct flashchip flashchips[] = {
|
||||
{
|
||||
.eraseblocks = { {4 * 1024, 128} },
|
||||
.block_erase = spi_block_erase_d7,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {64 * 1024, 8} },
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {512 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
@ -10726,10 +10726,10 @@ const struct flashchip flashchips[] = {
|
||||
{
|
||||
.eraseblocks = { {256, 1024} },
|
||||
.block_erase = spi_block_erase_db,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {64 * 1024, 4} },
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {256 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
@ -10756,10 +10756,10 @@ const struct flashchip flashchips[] = {
|
||||
{
|
||||
.eraseblocks = { {256, 2 * 1024} },
|
||||
.block_erase = spi_block_erase_db,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {64 * 1024, 8} },
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {512 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
@ -10787,10 +10787,10 @@ const struct flashchip flashchips[] = {
|
||||
{
|
||||
.eraseblocks = { {4 * 1024, 128} },
|
||||
.block_erase = spi_block_erase_d7,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {64 * 1024, 8} },
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {512 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
@ -10818,13 +10818,13 @@ const struct flashchip flashchips[] = {
|
||||
{
|
||||
.eraseblocks = { {4 * 1024, 256} },
|
||||
.block_erase = spi_block_erase_20,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {4 * 1024, 256} },
|
||||
.block_erase = spi_block_erase_d7,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {64 * 1024, 16} },
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {1024 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
@ -10852,10 +10852,10 @@ const struct flashchip flashchips[] = {
|
||||
{
|
||||
.eraseblocks = { {8 * 1024, 128} },
|
||||
.block_erase = spi_block_erase_d7,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {64 * 1024, 16} },
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
}, {
|
||||
.eraseblocks = { {1024 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
@ -10997,7 +10997,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 2048,
|
||||
.page_size = 256,
|
||||
.feature_bits = FEATURE_WRSR_WREN,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -11084,7 +11084,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 512,
|
||||
.page_size = 256,
|
||||
.feature_bits = FEATURE_WRSR_WREN,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PR,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers = {
|
||||
@ -11398,7 +11398,7 @@ const struct flashchip flashchips[] = {
|
||||
/* supports 4B addressing */
|
||||
/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers = {
|
||||
@ -11517,7 +11517,7 @@ const struct flashchip flashchips[] = {
|
||||
.manufacture_id = SPANSION_ID,
|
||||
.model_id = SPANSION_S25FL128,
|
||||
.total_size = 16384,
|
||||
.page_size = 512,
|
||||
.page_size = 256,
|
||||
/* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
@ -12655,7 +12655,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 512,
|
||||
.page_size = 4096,
|
||||
.feature_bits = FEATURE_EITHER_RESET,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_jedec,
|
||||
.probe_timing = 1, /* 150 ns */
|
||||
.block_erasers =
|
||||
@ -12911,7 +12911,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 2048,
|
||||
.page_size = 4 * 1024,
|
||||
.feature_bits = FEATURE_REGISTERMAP,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_82802ab,
|
||||
.probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */
|
||||
.block_erasers =
|
||||
@ -13035,7 +13035,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 512,
|
||||
.page_size = 64 * 1024,
|
||||
.feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_jedec,
|
||||
.probe_timing = 1, /* 150ns */
|
||||
.block_erasers =
|
||||
@ -14261,7 +14261,7 @@ const struct flashchip flashchips[] = {
|
||||
.page_size = 256,
|
||||
/* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
|
||||
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
|
||||
.tested = TEST_UNTESTED,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -14623,7 +14623,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 8192,
|
||||
.page_size = 256,
|
||||
.feature_bits = FEATURE_WRSR_WREN,
|
||||
.tested = TEST_OK_PROBE,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
@ -15182,7 +15182,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 512,
|
||||
.page_size = 64 * 1024,
|
||||
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_jedec,
|
||||
.probe_timing = 10,
|
||||
.block_erasers =
|
||||
@ -15419,7 +15419,7 @@ const struct flashchip flashchips[] = {
|
||||
.total_size = 1024,
|
||||
.page_size = 64 * 1024,
|
||||
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
|
||||
.tested = TEST_OK_PR,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_jedec,
|
||||
.probe_timing = 10,
|
||||
.block_erasers =
|
||||
|
||||
@ -847,6 +847,9 @@
|
||||
#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */
|
||||
#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */
|
||||
#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */
|
||||
#define ST_NP5Q032 0xDA16 /* Phase-change memory (PCM), 3V */
|
||||
#define ST_NP5Q064 0xDA17 /* Phase-change memory (PCM), 3V */
|
||||
#define ST_NP5Q128 0xDA18 /* Phase-change memory (PCM), 3V */
|
||||
|
||||
#define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
|
||||
#define MVC_V29C51000T 0x00
|
||||
|
||||
@ -552,13 +552,13 @@ syntax where
|
||||
is one of the following chips (please specify only the chip name, not the
|
||||
vendor):
|
||||
.sp
|
||||
.RB "* ST " M25P10.RES " SPI flash chip (RES, page write)"
|
||||
.RB "* ST " M25P10.RES " SPI flash chip (128 kB, RES, page write)"
|
||||
.sp
|
||||
.RB "* SST " SST25VF040.REMS " SPI flash chip (REMS, byte write)"
|
||||
.RB "* SST " SST25VF040.REMS " SPI flash chip (512 kB, REMS, byte write)"
|
||||
.sp
|
||||
.RB "* SST " SST25VF032B " SPI flash chip (RDID, AAI write)"
|
||||
.RB "* SST " SST25VF032B " SPI flash chip (4096 kB, RDID, AAI write)"
|
||||
.sp
|
||||
.RB "* Macronix " MX25L6436 " SPI flash chip (RDID, SFDP)"
|
||||
.RB "* Macronix " MX25L6436 " SPI flash chip (8192 kB, RDID, SFDP)"
|
||||
.sp
|
||||
Example:
|
||||
.B "flashrom -p dummy:emulate=SST25VF040.REMS"
|
||||
@ -899,6 +899,7 @@ can be
|
||||
STK200/300, " wiggler " for the Macraigor Wiggler, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)."
|
||||
.sp
|
||||
More information about the RayeR hardware is available at
|
||||
.nh
|
||||
.URLB "http://rayer.g6.cz/elektro/spipgm.htm" "RayeR's website" .
|
||||
The Altera ByteBlasterMV datasheet can be obtained from
|
||||
.URLB "http://www.altera.co.jp/literature/ds/dsbytemv.pdf" Altera .
|
||||
@ -953,10 +954,6 @@ you want to use with the
|
||||
parameter as explained in the
|
||||
.B nic3com et al.\&
|
||||
section above.
|
||||
.sp
|
||||
More information about the hardware is available at
|
||||
.nh
|
||||
.BR http://wiki.opengraphics.org .
|
||||
.SS
|
||||
.BR "linux_spi " programmer
|
||||
.IP
|
||||
@ -1148,7 +1145,7 @@ They are not modifiable by the user at all.
|
||||
.SH LICENSE
|
||||
.B flashrom
|
||||
is covered by the GNU General Public License (GPL), version 2. Some files are
|
||||
additionally available under the GPL (version 2, or any later version).
|
||||
additionally available under any later version of the GPL.
|
||||
.SH COPYRIGHT
|
||||
.br
|
||||
Please see the individual files.
|
||||
@ -1219,6 +1216,8 @@ Stephan Guilloux
|
||||
.br
|
||||
Steven James
|
||||
.br
|
||||
Urja Rannikko
|
||||
.br
|
||||
Uwe Hermann
|
||||
.br
|
||||
Wang Qingpei
|
||||
|
||||
@ -1672,7 +1672,7 @@ void list_programmers(const char *delim)
|
||||
if (p < PROGRAMMER_INVALID - 1)
|
||||
msg_ginfo("%s", delim);
|
||||
}
|
||||
msg_ginfo("\n");
|
||||
msg_ginfo("\n");
|
||||
}
|
||||
|
||||
void list_programmers_linebreak(int startcol, int cols, int paren)
|
||||
|
||||
@ -92,7 +92,7 @@ char* strtok_r(char *str, const char *delim, char **nextp)
|
||||
#endif
|
||||
|
||||
/* There is no strnlen in DJGPP */
|
||||
#if defined(__DJGPP__)
|
||||
#if defined(__DJGPP__) || !defined(HAVE_STRNLEN)
|
||||
size_t strnlen(const char *str, size_t n)
|
||||
{
|
||||
size_t i;
|
||||
|
||||
@ -45,7 +45,7 @@
|
||||
|
||||
|
||||
/* The next big hunk tries to guess endianess from various preprocessor macros */
|
||||
/* First some error checking in case some weird header has defines both.
|
||||
/* First some error checking in case some weird header has defined both.
|
||||
* NB: OpenBSD always defines _BIG_ENDIAN and _LITTLE_ENDIAN. */
|
||||
#if defined (__LITTLE_ENDIAN__) && defined (__BIG_ENDIAN__)
|
||||
#error Conflicting endianness #define
|
||||
|
||||
6
jedec.c
6
jedec.c
@ -184,13 +184,11 @@ static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
|
||||
else if (chip->probe_timing == TIMING_ZERO) { /* No delay. */
|
||||
probe_timing_enter = probe_timing_exit = 0;
|
||||
} else if (chip->probe_timing == TIMING_FIXME) { /* == _IGNORED */
|
||||
msg_cdbg("Chip lacks correct probe timing information, "
|
||||
"using default 10mS/40uS. ");
|
||||
msg_cdbg("Chip lacks correct probe timing information, using default 10ms/40us. ");
|
||||
probe_timing_enter = 10000;
|
||||
probe_timing_exit = 40;
|
||||
} else {
|
||||
msg_cerr("Chip has negative value in probe_timing, failing "
|
||||
"without chip access\n");
|
||||
msg_cerr("Chip has negative value in probe_timing, failing without chip access\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -35,6 +35,12 @@
|
||||
#include "programmer.h"
|
||||
#include "spi.h"
|
||||
|
||||
/* Devices known to work with this module (FIXME: export as struct dev_entry):
|
||||
* Beagle Bone Black
|
||||
* Raspberry Pi
|
||||
* HummingBoard
|
||||
*/
|
||||
|
||||
static int fd = -1;
|
||||
|
||||
static int linux_spi_shutdown(void *data);
|
||||
|
||||
7
os.h
7
os.h
@ -58,6 +58,11 @@
|
||||
#define __FLASHROM_OS__ "libpayload"
|
||||
// Linux
|
||||
#elif defined(__linux__)
|
||||
#define __FLASHROM_OS__ "Linux"
|
||||
// There are various flags in use on Android apparently. __ANDROID__ seems to be the most trustworthy.
|
||||
#if defined(__ANDROID__)
|
||||
#define __FLASHROM_OS__ "Android"
|
||||
#else
|
||||
#define __FLASHROM_OS__ "Linux"
|
||||
#endif
|
||||
#endif
|
||||
__FLASHROM_OS__
|
||||
|
||||
41
print.c
41
print.c
@ -542,7 +542,7 @@ const struct board_info boards_known[] = {
|
||||
B("abit", "VA6", OK, NULL, NULL),
|
||||
B("abit", "VT6X4", OK, NULL, NULL),
|
||||
B("Acer", "V75-M", OK, NULL, "This is an OEM board used by IBM in e.g. Aptiva 2170-G"),
|
||||
B("Acer", "EM61SM/EM61PM", OK, NULL, "Used in Acer Aspire T180."),
|
||||
B("Acer", "EM61SM/EM61PM", OK, NULL, "Used in Acer Aspire T180 and E380. Seems to be an OEM variant of abit's NF-M2S."),
|
||||
B("Acorp", "6A815EPD", OK, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
|
||||
B("Acorp", "6M810C", OK, NULL, NULL),
|
||||
B("ADLINK", "Express-HR", OK, "http://www.adlinktech.com/PD/web/PD_detail.php?pid=1012", NULL),
|
||||
@ -568,10 +568,13 @@ const struct board_info boards_known[] = {
|
||||
B("ASRock", "A780FullHD", OK, "http://www.asrock.com/mb/overview.asp?Model=A780FullHD", "While flashrom is working correctly, there might be problems with the firmware images themselves. Please see https://flashrom.org/pipermail/flashrom/2012-July/009600.html for details."),
|
||||
B("ASRock", "ALiveNF6G-DVI", OK, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
|
||||
B("ASRock", "AM2NF6G-VSTA", OK, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
|
||||
B("ASRock", "AMCP7AION-HT", OK, "http://www.asrock.com/nettop/NVIDIA/ION%20330HT/", "Used in ION 330HT(-BD) barebones."),
|
||||
B("ASRock", "ConRoeXFire-eSATA2", OK, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
|
||||
B("ASRock", "E350M1/USB3", OK, "http://www.asrock.com/mb/overview.asp?model=e350m1/usb3", NULL),
|
||||
B("ASRock", "E350M1/USB3", OK, "http://www.asrock.com/mb/overview.asp?model=e350m1/usb3", "Vendor firmware writes to flash at shutdown. This probably corrupts the flash in case you write coreboot while running the vendor firmware. Simply updating the vendor firmware should be fine."),
|
||||
B("ASRock", "Fatal1ty Z77 Performance", BAD, "http://www.asrock.com/mb/overview.asp?Model=Fatal1ty%20Z77%20Performance", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("ASRock", "G31M-GS", OK, "http://www.asrock.com/mb/overview.asp?Model=G31M-GS", NULL),
|
||||
B("ASRock", "G31M-S rev 2.0", OK, "http://www.asrock.com/mb/overview.asp?model=G31M-S", NULL),
|
||||
B("ASRock", "G41M-VS3", OK, "http://www.asrock.com/mb/overview.asp?Model=G41M-VS3", NULL),
|
||||
B("ASRock", "H61M-ITX", BAD, "http://www.asrock.com/mb/overview.asp?Model=H61M-ITX", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("ASRock", "H67M", BAD, "http://www.asrock.com/mb/overview.asp?Model=H67M", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("ASRock", "IMB-180-H", OK, "http://www.asrock.com/ipc/overview.asp?Model=IMB-A180-H", NULL),
|
||||
@ -581,6 +584,7 @@ const struct board_info boards_known[] = {
|
||||
B("ASRock", "K8S8X", OK, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
|
||||
B("ASRock", "M3A790GXH/128M", OK, "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
|
||||
B("ASRock", "N61P-S", OK, "http://www.asrock.com/mb/overview.asp?Model=N61P-S", NULL),
|
||||
B("ASRock", "N68C-S UCC", OK, "http://www.asrock.com/mb/overview.asp?Model=N68C-S%20UCC", NULL),
|
||||
B("ASRock", "P4i65GV", OK, "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
|
||||
B("ASRock", "Z68 Extreme4", BAD, "http://www.asrock.com/mb/overview.asp?Model=Z68%20Extreme4", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("ASUS", "A7N8X Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
|
||||
@ -609,6 +613,7 @@ const struct board_info boards_known[] = {
|
||||
B("ASUS", "C60M1-I", OK, "http://www.asus.com/Motherboards/C60M1I/", "The MAC address of the onboard network card is stored in flash."),
|
||||
B("ASUS", "Crosshair II Formula", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
|
||||
B("ASUS", "Crosshair IV Extreme", OK, "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
|
||||
B("ASUS", "CUSL2-C", OK, NULL, "The image provided by ASUS is only 256 kB big and has to be written to the upper 256 kB of the 512 kB chip."),
|
||||
B("ASUS", "DSAN-DX", NT, "http://www.asus.com/Server_Workstation/Server_Motherboards/DSANDX/", NULL),
|
||||
B("ASUS", "E35M1-I DELUXE", OK, "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
|
||||
B("ASUS", "F1A75-V PRO", OK, "http://www.asus.com/Motherboard/F1A75V_PRO/", NULL),
|
||||
@ -694,11 +699,13 @@ const struct board_info boards_known[] = {
|
||||
B("ASUS", "P5GDC Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
|
||||
B("ASUS", "P5GDC-V Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
|
||||
B("ASUS", "P5GD2/C variants", NT, NULL, "Untested board enable."),
|
||||
B("ASUS", "P5K SE", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5K_SE/", NULL),
|
||||
B("ASUS", "P5K-V", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
|
||||
B("ASUS", "P5K-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
|
||||
B("ASUS", "P5KC", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
|
||||
B("ASUS", "P5KPL-AM IN/GB", OK, "http://support.asus.com/download.aspx?SLanguage=en&m=P5KPL-AM+IN%2fGB&os=29", NULL),
|
||||
B("ASUS", "P5KPL-CM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
|
||||
B("ASUS", "P5KPL-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLVM/", "Found in V3-P5G31."),
|
||||
B("ASUS", "P5L-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
|
||||
B("ASUS", "P5L-VM 1394", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
|
||||
B("ASUS", "P5LD2", OK, NULL, NULL),
|
||||
@ -740,9 +747,9 @@ const struct board_info boards_known[] = {
|
||||
B("ASUS", "P8Z68-V LE", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("ASUS", "P8Z68-V PRO", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("ASUS", "P8Z68-V PRO/GEN3", OK, "http://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V_PROGEN3/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."),
|
||||
B("ASUS", "RAMPAGE III GENE", OK, "http://www.asus.com/Motherboards/RAMPAGE_III_GENE/", "The MAC address of the onboard network card is stored in flash."),
|
||||
B("ASUS", "SABERTOOTH 990FX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX/", NULL),
|
||||
B("ASUS", "SABERTOOTH 990FX R2.0", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX_R20/", NULL),
|
||||
B("ASUS", "CUSL2-C", OK, NULL, "The image provided by ASUS is only 256 kB big and has to be written to the upper 256 kB of the 512 kB chip."),
|
||||
B("ASUS", "TUSL2-C", NT, "http://support.asus.com/download.aspx?SLanguage=en&p=1&s=4&m=TUSL2-C&os=&hashedid=n/a", "Untested board enable."),
|
||||
B("ASUS", "Z8NA-D6C", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
|
||||
B("ASUS", "Z8PE-D12", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
|
||||
@ -827,27 +834,36 @@ const struct board_info boards_known[] = {
|
||||
B("GIGABYTE", "GA-8S648", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1674", NULL),
|
||||
B("GIGABYTE", "GA-8SIMLFS 2.0", OK, NULL, "This is an OEM board used by Fujitsu."),
|
||||
B("GIGABYTE", "GA-8SIMLH", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
|
||||
B("GIGABYTE", "GA-945GCM-S2 (rev. 3.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2466", NULL),
|
||||
B("GIGABYTE", "GA-945GM-S2", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2331", NULL),
|
||||
B("GIGABYTE", "GA-945PL-S3P (rev. 6.6)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
|
||||
B("GIGABYTE", "GA-965GM-S2 (rev. 2.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
|
||||
B("GIGABYTE", "GA-965P-DS4", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
|
||||
B("GIGABYTE", "GA-965P-S3 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2321", NULL),
|
||||
B("GIGABYTE", "GA-970A-D3P (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4642", NULL),
|
||||
B("GIGABYTE", "GA-970A-UD3P (rev. 2.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=5194", "Primary flash chip is a Macronix MX25L3206E."),
|
||||
B("GIGABYTE", "GA-990FXA-UD3 (rev. 4.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4672", NULL),
|
||||
B("GIGABYTE", "GA-A75M-UD2H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3928", NULL),
|
||||
B("GIGABYTE", "GA-B85M-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4567", NULL),
|
||||
B("GIGABYTE", "GA-EP31-DS3L (rev. 2.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
|
||||
B("GIGABYTE", "GA-EG43M-S2H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2878", NULL),
|
||||
B("GIGABYTE", "GA-EP31-DS3L (rev. 1.0, 2.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
|
||||
B("GIGABYTE", "GA-EP35-DS3L", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
|
||||
B("GIGABYTE", "GA-EX58-UD4P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
|
||||
B("GIGABYTE", "GA-G33M-S2", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2557", NULL),
|
||||
B("GIGABYTE", "GA-G33M-S2L", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2692", NULL),
|
||||
B("GIGABYTE", "GA-G41MT-S2PT", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3960", NULL),
|
||||
B("GIGABYTE", "GA-H55M-S2", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3509", "8 MB (ME) + 1 MB (BIOS) flash chips - hardware sequencing required."),
|
||||
B("GIGABYTE", "GA-H61M-D2-B3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3773", NULL),
|
||||
B("GIGABYTE", "GA-H61M-D2H-USB3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4004", NULL),
|
||||
B("GIGABYTE", "GA-H77-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4141", "Does only work with -p internal:ich_spi_mode=hwseq due to an evil twin of MX25L6405 and ICH SPI lockdown."),
|
||||
B("GIGABYTE", "GA-H77-DS3H (rev. 1.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4318", NULL),
|
||||
B("GIGABYTE", "GA-H77M-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4388", NULL),
|
||||
B("GIGABYTE", "GA-J1900N-D3V", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4918", NULL),
|
||||
B("GIGABYTE", "GA-K8N51GMF-9", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
|
||||
B("GIGABYTE", "GA-K8N51GMF", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
|
||||
B("GIGABYTE", "GA-K8N-SLI", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
|
||||
B("GIGABYTE", "GA-K8NS Pro-939", NT, "http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
|
||||
B("GIGABYTE", "GA-K8NS", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1784", NULL),
|
||||
B("GIGABYTE", "GA-M56S-S3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2607", NULL),
|
||||
B("GIGABYTE", "GA-M57SLI-S4", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
|
||||
B("GIGABYTE", "GA-M61P-S3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
|
||||
B("GIGABYTE", "GA-M720-US3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
|
||||
@ -863,6 +879,8 @@ const struct board_info boards_known[] = {
|
||||
B("GIGABYTE", "GA-MA790FX-DQ6", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
|
||||
B("GIGABYTE", "GA-MA790GP-DS4H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
|
||||
B("GIGABYTE", "GA-MA790XT-UD4P (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
|
||||
B("GIGABYTE", "GA-P31-DS3L", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2615", NULL),
|
||||
B("GIGABYTE", "GA-P31-S3G", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2676", NULL),
|
||||
B("GIGABYTE", "GA-P55-USB3 (rev. 2.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3440", NULL),
|
||||
B("GIGABYTE", "GA-P55A-UD4 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
|
||||
B("GIGABYTE", "GA-P55A-UD7" , OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3324", NULL),
|
||||
@ -889,7 +907,7 @@ const struct board_info boards_known[] = {
|
||||
B("HP", "Vectra VL420 SFF", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
|
||||
B("HP", "xw4400 (0A68h)", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
|
||||
B("HP", "xw6400", BAD, NULL, "No chip found, see https://flashrom.org/pipermail/flashrom/2012-March/009006.html"),
|
||||
B("HP", "xw9300", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodTypeId=12454&prodSeriesId=459226", "Missing board enable, see https://flashrom.org/pipermail/flashrom/2012-February/008862.html"),
|
||||
B("HP", "xw9300", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodTypeId=12454&prodSeriesId=459226", "Missing board enable, see https://flashrom.org/pipermail/flashrom/2012-March/008885.html"),
|
||||
B("HP", "xw9400", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
|
||||
B("HP", "Z400 Workstation (0AE4h)", BAD, NULL, "ICH10R with BIOS lock enable and a protected range PRBAD, see https://flashrom.org/pipermail/flashrom/2012-June/009350.html"),
|
||||
B("IBASE", "MB899", OK, "http://www.ibase-i.com.tw/2009/mb899.html", NULL),
|
||||
@ -958,6 +976,7 @@ const struct board_info boards_known[] = {
|
||||
B("MSI", "MS-7309 (K9N6SGM-V)", BAD, "http://www.msi.com/product/mb/K9N6SGM-V---K9N6PGM-FI---K9N6PGM-F.html", "Uses Fintek F71882F/F71883F/F71887 SPI-to-LPC translation."),
|
||||
B("MSI", "MS-7309 (K9N6PGM2-V2)", OK, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
|
||||
B("MSI", "MS-7312 (K9MM-V)", OK, "http://www.msi.com/product/mb/K9MM-V.html", NULL),
|
||||
B("MSI", "MS-7336", OK, NULL, "Some non-essential DMI data (e.g. serial numbers) is overwritten when using flashrom. This is an OEM board used by HP (e.g. dx2300 Microtower)."),
|
||||
B("MSI", "MS-7345 (P35 Neo2-FIR)", OK, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
|
||||
B("MSI", "MS-7357 (G33M)", OK, "http://www.msi.com/product/mb/G33M.html", NULL),
|
||||
B("MSI", "MS-7368 (K9AG Neo2-Digital)", OK, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
|
||||
@ -984,6 +1003,7 @@ const struct board_info boards_known[] = {
|
||||
B("MSI", "MS-7698 (E350IA-E45)", OK, "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
|
||||
B("MSI", "MS-7740 (H61MA-E35(B3))", OK, "http://www.msi.com/product/mb/H61MA-E35--B3-.html", NULL),
|
||||
B("MSI", "MS-7756 (H77MA-G43)", OK, "http://www.msi.com/product/mb/H77MA-G43.html", NULL),
|
||||
B("MSI", "MS-7760 (X79A-GD45 (8D))", OK, "http://www.msi.com/product/mb/X79A-GD45-8D.html", NULL),
|
||||
B("MSI", "MS-7808 (B75MA-E33)", OK, "http://www.msi.com/product/mb/B75MA-E33.html", NULL),
|
||||
B("MSI", "MS-7816 (H87-G43)", OK, "http://www.msi.com/product/mb/H87-G43.html", NULL),
|
||||
B("MSI", "MS-7817 (H81M-E33)", OK, "http://www.msi.com/product/mb/H81ME33.html", NULL),
|
||||
@ -1028,11 +1048,13 @@ const struct board_info boards_known[] = {
|
||||
B("Sun", "Fire x4540", BAD, "http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
|
||||
B("Sun", "Fire x4600", BAD, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
|
||||
B("Sun", "Ultra 40 M2", OK, "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
|
||||
B("Supermicro", "A1SAi-2550F", OK, "http://www.supermicro.com/products/motherboard/Atom/X10/A1SAi-2550F.cfm", NULL),
|
||||
B("Supermicro", "H8QC8", OK, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
|
||||
B("Supermicro", "H8QME-2", OK, "http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QME-2.cfm", NULL),
|
||||
B("Supermicro", "X10SLM-F", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C220/X10SLM-F.cfm", "Probing works (Winbond W25Q128, 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked; SMM protection enabled."),
|
||||
B("Supermicro", "X5DP8-G2", OK, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
|
||||
B("Supermicro", "X7DBT-INF", OK, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
|
||||
B("Supermicro", "X7DWT", OK, "http://www.supermicro.com/products/motherboard/Xeon1333/5400/X7DWT.cfm", "Used in Dell C6100 servers."),
|
||||
B("Supermicro", "X7SPA-H(F)", OK, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H", NULL),
|
||||
B("Supermicro", "X7SPE-HF-D525", OK, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPE-HF-D525.cfm", NULL),
|
||||
B("Supermicro", "X8DT3", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
|
||||
@ -1129,19 +1151,22 @@ const struct board_info laptops_known[] = {
|
||||
B("Acer", "Aspire One", BAD, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
|
||||
B("ASUS", "A8Jm", OK, NULL, NULL),
|
||||
B("ASUS", "Eee PC 701 4G", BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
|
||||
B("ASUS", "M6Ne", NT, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
|
||||
B("ASUS", "M6Ne", NT, NULL, "Untested board enable."),
|
||||
B("ASUS", "U38N", OK, NULL, NULL),
|
||||
B("Clevo", "P150HM", BAD, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
|
||||
B("Dell", "Latitude D630", OK, NULL, NULL),
|
||||
B("Dell", "Inspiron 1420", OK, NULL, NULL),
|
||||
B("Dell", "Latitude CPi A366XT", BAD, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
|
||||
B("Dell", "Vostro 3700", BAD, NULL, "Locked ME, see https://flashrom.org/pipermail/flashrom/2012-May/009197.html."),
|
||||
B("Dell", "Latitude E6520", BAD, NULL, "Locked ME, see https://flashrom.org/pipermail/flashrom/2012-June/009420.html."),
|
||||
B("Elitegroup", "A928", OK, NULL, "Bootsector is locked and needs to be skipped with a layout file (writeable address range is 00000000:0003bfff)."),
|
||||
B("Fujitsu", "Amilo Xi 3650", OK, NULL, NULL),
|
||||
B("HP/Compaq", "EliteBook 8560p", BAD, NULL, "SPI lock down, SMM protection, PR in BIOS region, read-only descriptor, locked ME region."),
|
||||
B("HP/Compaq", "nx9005", BAD, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. https://flashrom.org/pipermail/flashrom/2010-May/003321.html"),
|
||||
B("HP/Compaq", "nx9010", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
|
||||
B("IBM/Lenovo", "ThinkPad T40p", BAD, "http://www.thinkwiki.org/wiki/Category:T40p", NULL),
|
||||
B("IBM/Lenovo", "ThinkPad T420", BAD, "http://www.thinkwiki.org/wiki/Category:T420", "Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs) and ME is locked. Also, a Protected Range is locking the top range of the BIOS region (presumably the boot block)."),
|
||||
B("IBM/Lenovo", "ThinkPad T410s", BAD, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs) and ME is locked. Also, a Protected Range is locking the top range of the BIOS region (presumably the boot block)."),
|
||||
B("IBM/Lenovo", "ThinkPad T420", BAD, "http://www.thinkwiki.org/wiki/Category:T420", "Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs) and ME is locked. Also, a Protected Range is locking the top range of the BIOS region (presumably the boot block)."),
|
||||
B("IBM/Lenovo", "ThinkPad X1", BAD, "http://www.thinkwiki.org/wiki/Category:X1", "Probing works (ST M25PX64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs) and ME is locked. Also, a Protected Range is locking the top range of the BIOS region (presumably the boot block)."),
|
||||
B("IBM/Lenovo", "ThinkPad T530", DEP, "http://www.thinkwiki.org/wiki/Category:T530", "Works fine but only with coreboot (due to locked regions and additional PR restrictions)."),
|
||||
B("IBM/Lenovo", "ThinkPad 240", BAD, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
|
||||
|
||||
@ -592,8 +592,8 @@ enum spi_controller {
|
||||
#define MAX_DATA_WRITE_UNLIMITED 256
|
||||
struct spi_master {
|
||||
enum spi_controller type;
|
||||
unsigned int max_data_read;
|
||||
unsigned int max_data_write;
|
||||
unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
|
||||
unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
|
||||
int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
|
||||
const unsigned char *writearr, unsigned char *readarr);
|
||||
int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
|
||||
|
||||
@ -232,7 +232,7 @@ static int sp_docommand(uint8_t command, uint32_t parmlen,
|
||||
if (c == S_NAK)
|
||||
return 1;
|
||||
if (c != S_ACK) {
|
||||
msg_perr("Error: invalid response 0x%02X from device\n", c);
|
||||
msg_perr("Error: invalid response 0x%02X from device (to command 0x%02X)\n", c, command);
|
||||
return 1;
|
||||
}
|
||||
if (retlen) {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user