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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 07:02:34 +02:00
flashrom/hwaccess.h
Stefan Tauner 23e10b8780 Add a bunch of new/tested stuff and various small changes 24
Tested mainboards:
OK:
 - ASRock G31M-GS
   Reported by Александр Трубицын
 - ASRock G41M-VS3
   Reported by Александр Трубицын
 - ASRock N68C-S UCC
   Reported by Alexey Belyaev
 - ASRock AMCP7AION-HT (ION 330HT(-BD))
   Reported by Stefan Tauner
 - ASUS P5K SE
   Reported by Александр Трубицын
 - ASUS P5KPL-VM
   Reported by Marin Vlah
 - ASUS RAMPAGE III GENE
   Reported by stevessss on IRC
 - GIGABYTE GA-945GM-S2
   Reported by Александр Трубицын
 - GIGABYTE GA-945GCM-S2 (rev. 3.0)
   Reported by Александр Трубицын
 - GIGABYTE GA-965P-S3
   Reported by Александр Трубицын
 - GIGABYTE GA-EG43M-S2H
   Reported by Александр Трубицын
 - GIGABYTE GA-EP31-DS3L (rev. 1.0)
   Reported by Александр Трубицын
 - GIGABYTE GA-G33M-S2
   Reported by Александр Трубицын
 - GIGABYTE GA-G33M-S2L
   Reported by Александр Трубицын
 - GIGABYTE GA-H55M-S2
   Reported by Александр Трубицын
 - GIGABYTE GA-J1900N-D3V
   Reported by Marcos Truchado and Guillermo von Hünefeld
 - GIGABYTE GA-K8NS
   Reported  by nicolae788
 - GIGABYTE GA-M56S-S3
   Reported by Estevo Paz Freire
 - GIGABYTE GA-P31-DS3L
   Reported by Александр Трубицын
 - GIGABYTE GA-P31-S3G
   Reported by Александр Трубицын
 - MSI MS-7336
   Reported by Benjamin Bellec
 - MSI X79A-GD45 (8D) (MS-7760)"
   Reported by mortehu on IRC
 - Supermicro A1SAi-2550F
   Reported by Bernard Grymonpon
 - Supermicro X7DWT
   Reported by Steven Stremciuc

Laptop:
 - ASUS U38N
   Reported by Ultra on IRC
 - Dell Latitude D630
   Reported by Márton Miklós
 - Fujitsu Amilo Xi 3650
   Reported by Elmar Stellnberger
 - Lenovo T400 (whitelisting only)

Chipsets:
 - Mark 8086:1f38 (Intel Avoton/Rangeley) as tested
   Reported by Jeremy Porter and Bernard Grymonpon
 - Add Intel Sunrise Point IDs but no support yet.

Flash chips:
 - Atmel AT45DB321D to PREW (+PREW)
   Reported by The Raven
 - Eon EN25QH32 to PREW (+PREW)
   Reported by Josua Mayer
 - Eon EN25QH64 to PREW (+EW)
   Reported by David s. Alessio
 - GigaDevice GD25LQ64(B) to PREW (+PREW)
   Reported by Greg Tippit
 - Intel 28F001BN/BX-T to PREW (+EW)
   Reported by Lu Xie
 - Micron M25P10-A to PREW (+W)
   Reported by the Raven
 - Micron M25PE40
   Reported by David Wood
 - Micron N25Q128..3E to PREW (+PREW)
   Reported by Miklós Márton
 - Macronix MX25L3273E to PREW (+PREW)
   Reported by Roklobsta on IRC
 - Macronix MX23L6454 to PR (+PR)
   Reported by Steven Honeyman
 - Macronix MX25U6435E/F to PREW (+PREW)
   Reported by Marcos Truchado and Guillermo von Hünefeld
 - PMC Pm25LQ032C to PREW (+EW)
   Reported by Dirk Knop
 - Spansion S25FL016A to PREW (+EW)
   Reported by Márton Miklós
 - Spansion S25FL128S......0 to PREW (+PREW)
   Reported by Jim Houston
 - Spansion S25FL204K to PR (+PR)
   Reported by Thomas Debrunner
 - SST SST49LF016C to PREW (+EW)
   Reported by Steven Stremciuc
 - SST SST39VF040 to PREW (+PREW)
   Reported by Xavier Bourgeois
 - SST SST49LF040B to PREW (+EW)
   Reported by Rikard Åhlund
 - ST M25P10-A to PREW (+W)
   Reported by Martijn Schiedon
 - Winbond W39V040FA to PREW (+EW)
   Reported by Евгений Черкашин
 - Winbond W39V080FA to PREW (+EW)
   Reported by protagonist0 on IRC
 - Winbond W25Q80.W to PREW (+PREW)
   Reported by Miklós Márton
 - Winbond W25X64 to PREW (+REW)
   Reported by Johannes Krampf and Manuel Dejonghe
 - Fix ID of AMIC A25LQ64
   Reported by Roman Titov
 - Fix page size of Spansion S25FL129P......1
   Copy and paste error from the 128S uniform 256kB variant, probably.
 - Add Micron/Numonyx phase-change memory IDs

Miscellaneous:
 - Detect Android target OS.
   No changes are required to build flashrom (excluding programmers
   with NEED_PCI) on Android.
 - Update rayerspi (spipgm) URL
 - Fix max_data_write handling of at45db.
 - Minor refinement of the README
 - Mark board enable for the GA-K8NS variants as tested.
   Tested by "nicolae788" on a board with socket 754.
 - Mark "Multi-system" chassis as non-laptop case.
 - Remove W836xx log requests.
   We got enough (and no one is looking at them for the time being anyway).
 - serprog: improve invalid reply error message, contributed by Urja Rannikko.
 - Remove default include paths for MinGW.
 - Disable implicit rules in the Makefile because we don't need them and they
   just make the build (imperceptibly) slower.
 - Enable our own strnlen() implementation not only on DJGPP but also if
   HAVE_STRNLEN is not defined. This is needed to get older BSDs
   (e.g. NetBSD 6.0, FreeBSD < 8.0) to work.
 - Tiny other stuff.

Corresponding to flashrom svn r1917.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
2016-01-23 16:16:49 +00:00

382 lines
10 KiB
C

/*
* This file is part of the flashrom project.
*
* Copyright (C) 2009 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*
* Header file for hardware access and OS abstraction. Included from flash.h.
*/
#ifndef __HWACCESS_H__
#define __HWACCESS_H__ 1
#include "platform.h"
#if NEED_PCI == 1
/*
* libpci headers use the variable name "index" which triggers shadowing
* warnings on systems which have the index() function in a default #include
* or as builtin.
*/
#define index shadow_workaround_index
#if !defined (__NetBSD__)
#include <pci/pci.h>
#else
#include <pciutils/pci.h>
#endif
#undef index
#endif /* NEED_PCI == 1 */
/* The next big hunk tries to guess endianess from various preprocessor macros */
/* First some error checking in case some weird header has defined both.
* NB: OpenBSD always defines _BIG_ENDIAN and _LITTLE_ENDIAN. */
#if defined (__LITTLE_ENDIAN__) && defined (__BIG_ENDIAN__)
#error Conflicting endianness #define
#endif
#if IS_X86
/* All x86 is little-endian. */
#define __FLASHROM_LITTLE_ENDIAN__ 1
#elif IS_MIPS
/* MIPS can be either endian. */
#if defined (__MIPSEL) || defined (__MIPSEL__) || defined (_MIPSEL) || defined (MIPSEL)
#define __FLASHROM_LITTLE_ENDIAN__ 1
#elif defined (__MIPSEB) || defined (__MIPSEB__) || defined (_MIPSEB) || defined (MIPSEB)
#define __FLASHROM_BIG_ENDIAN__ 1
#endif
#elif IS_PPC
/* PowerPC can be either endian. */
#if defined (_BIG_ENDIAN) || defined (__BIG_ENDIAN__)
#define __FLASHROM_BIG_ENDIAN__ 1
#elif defined (_LITTLE_ENDIAN) || defined (__LITTLE_ENDIAN__)
#define __FLASHROM_LITTLE_ENDIAN__ 1
#endif
#elif IS_ARM
/* ARM can be either endian. */
#if defined (__ARMEB__)
#define __FLASHROM_BIG_ENDIAN__ 1
#elif defined (__ARMEL__)
#define __FLASHROM_LITTLE_ENDIAN__ 1
#endif
#elif IS_SPARC
/* SPARC is big endian in general (but allows to access data in little endian too). */
#define __FLASHROM_BIG_ENDIAN__ 1
#endif /* IS_? */
#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
/* If architecture-specific approaches fail try generic variants. First: BSD (works about everywhere). */
#if !IS_WINDOWS
#include <sys/param.h>
#if defined (__BYTE_ORDER)
#if __BYTE_ORDER == __LITTLE_ENDIAN
#define __FLASHROM_LITTLE_ENDIAN__
#elif __BYTE_ORDER == __BIG_ENDIAN
#define __FLASHROM_BIG_ENDIAN__
#else
#error Unknown byte order!
#endif
#endif /* defined __BYTE_ORDER */
#endif /* !IS_WINDOWS */
#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
/* Nonstandard libc-specific macros for determining endianness. */
/* musl provides an endian.h as well... but it can not be detected from within C. */
#if defined(__GLIBC__)
#include <endian.h>
#if BYTE_ORDER == LITTLE_ENDIAN
#define __FLASHROM_LITTLE_ENDIAN__ 1
#elif BYTE_ORDER == BIG_ENDIAN
#define __FLASHROM_BIG_ENDIAN__ 1
#endif
#endif
#endif
#endif
#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
#error Unable to determine endianness.
#endif
#define ___constant_swab8(x) ((uint8_t) ( \
(((uint8_t)(x) & (uint8_t)0xffU))))
#define ___constant_swab16(x) ((uint16_t) ( \
(((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \
(((uint16_t)(x) & (uint16_t)0xff00U) >> 8)))
#define ___constant_swab32(x) ((uint32_t) ( \
(((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
(((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
(((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
(((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
#define ___constant_swab64(x) ((uint64_t) ( \
(((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \
(((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \
(((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \
(((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) << 8) | \
(((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \
(((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \
(((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \
(((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56)))
#if defined (__FLASHROM_BIG_ENDIAN__)
#define cpu_to_le(bits) \
static inline uint##bits##_t cpu_to_le##bits(uint##bits##_t val) \
{ \
return ___constant_swab##bits(val); \
}
cpu_to_le(8)
cpu_to_le(16)
cpu_to_le(32)
cpu_to_le(64)
#define cpu_to_be8
#define cpu_to_be16
#define cpu_to_be32
#define cpu_to_be64
#elif defined (__FLASHROM_LITTLE_ENDIAN__)
#define cpu_to_be(bits) \
static inline uint##bits##_t cpu_to_be##bits(uint##bits##_t val) \
{ \
return ___constant_swab##bits(val); \
}
cpu_to_be(8)
cpu_to_be(16)
cpu_to_be(32)
cpu_to_be(64)
#define cpu_to_le8
#define cpu_to_le16
#define cpu_to_le32
#define cpu_to_le64
#endif /* __FLASHROM_BIG_ENDIAN__ / __FLASHROM_LITTLE_ENDIAN__ */
#define be_to_cpu8 cpu_to_be8
#define be_to_cpu16 cpu_to_be16
#define be_to_cpu32 cpu_to_be32
#define be_to_cpu64 cpu_to_be64
#define le_to_cpu8 cpu_to_le8
#define le_to_cpu16 cpu_to_le16
#define le_to_cpu32 cpu_to_le32
#define le_to_cpu64 cpu_to_le64
#if NEED_PCI == 1
#if IS_X86
/* sys/io.h provides iopl(2) and x86 I/O port access functions (inb, outb etc).
* It is included in glibc (thus available also on debian/kFreeBSD) but also in other libcs that mimic glibc,
* e.g. musl and uclibc. */
#if defined(__linux__) || defined(__GLIBC__)
#include <sys/io.h>
#endif
#define __FLASHROM_HAVE_OUTB__ 1
/* for iopl and outb under Solaris */
#if defined (__sun)
#include <sys/sysi86.h>
#include <sys/psw.h>
#include <asm/sunddi.h>
#endif
/* Clarification about OUTB/OUTW/OUTL argument order:
* OUT[BWL](val, port)
*/
#if defined(__FreeBSD__) || defined(__DragonFly__)
/* Note that Debian/kFreeBSD (FreeBSD kernel with glibc) has conflicting
* out[bwl] definitions in machine/cpufunc.h and sys/io.h at least in some
* versions. Use machine/cpufunc.h only for plain FreeBSD/DragonFlyBSD.
*/
#include <machine/cpufunc.h>
#define OUTB(x, y) do { u_int outb_tmp = (y); outb(outb_tmp, (x)); } while (0)
#define OUTW(x, y) do { u_int outw_tmp = (y); outw(outw_tmp, (x)); } while (0)
#define OUTL(x, y) do { u_int outl_tmp = (y); outl(outl_tmp, (x)); } while (0)
#define INB(x) __extension__ ({ u_int inb_tmp = (x); inb(inb_tmp); })
#define INW(x) __extension__ ({ u_int inw_tmp = (x); inw(inw_tmp); })
#define INL(x) __extension__ ({ u_int inl_tmp = (x); inl(inl_tmp); })
#else
#if defined (__sun)
/* Note different order for outb */
#define OUTB(x,y) outb(y, x)
#define OUTW(x,y) outw(y, x)
#define OUTL(x,y) outl(y, x)
#define INB inb
#define INW inw
#define INL inl
#else
#ifdef __DJGPP__
#include <pc.h>
#define OUTB(x,y) outportb(y, x)
#define OUTW(x,y) outportw(y, x)
#define OUTL(x,y) outportl(y, x)
#define INB inportb
#define INW inportw
#define INL inportl
#else
#if defined(__MACH__) && defined(__APPLE__)
/* Header is part of the DirectHW library. */
#include <DirectHW/DirectHW.h>
#endif
/* This is the usual glibc interface. */
#define OUTB outb
#define OUTW outw
#define OUTL outl
#define INB inb
#define INW inw
#define INL inl
#endif
#endif
#endif
#if defined(__NetBSD__) || defined (__OpenBSD__)
#if defined(__i386__) || defined(__x86_64__)
#include <sys/types.h>
#include <machine/sysarch.h>
#if defined(__NetBSD__)
#if defined(__i386__)
#define iopl i386_iopl
#elif defined(__x86_64__)
#define iopl x86_64_iopl
#endif
#elif defined (__OpenBSD__)
#if defined(__i386__)
#define iopl i386_iopl
#elif defined(__amd64__)
#define iopl amd64_iopl
#endif
#endif
static inline void outb(uint8_t value, uint16_t port)
{
__asm__ volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
}
static inline uint8_t inb(uint16_t port)
{
uint8_t value;
__asm__ volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
return value;
}
static inline void outw(uint16_t value, uint16_t port)
{
__asm__ volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
}
static inline uint16_t inw(uint16_t port)
{
uint16_t value;
__asm__ volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
return value;
}
static inline void outl(uint32_t value, uint16_t port)
{
__asm__ volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
}
static inline uint32_t inl(uint16_t port)
{
uint32_t value;
__asm__ volatile ("inl %1,%0":"=a" (value):"Nd" (port));
return value;
}
#endif
#endif
#if !(defined(__MACH__) && defined(__APPLE__)) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
typedef struct { uint32_t hi, lo; } msr_t;
msr_t rdmsr(int addr);
int wrmsr(int addr, msr_t msr);
#endif
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
/* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
#undef rdmsr
#undef wrmsr
#define rdmsr freebsd_rdmsr
#define wrmsr freebsd_wrmsr
typedef struct { uint32_t hi, lo; } msr_t;
msr_t freebsd_rdmsr(int addr);
int freebsd_wrmsr(int addr, msr_t msr);
#endif
#if defined(__LIBPAYLOAD__)
#include <arch/io.h>
#include <arch/msr.h>
typedef struct { uint32_t hi, lo; } msr_t;
msr_t libpayload_rdmsr(int addr);
int libpayload_wrmsr(int addr, msr_t msr);
#undef rdmsr
#define rdmsr libpayload_rdmsr
#define wrmsr libpayload_wrmsr
#endif
#elif IS_PPC
/* PCI port I/O is not yet implemented on PowerPC. */
#elif IS_MIPS
/* PCI port I/O is not yet implemented on MIPS. */
#elif IS_SPARC
/* PCI port I/O is not yet implemented on SPARC. */
#elif IS_ARM
/* Non memory mapped I/O is not supported on ARM. */
#else
#error Unknown architecture, please check if it supports PCI port IO.
#endif /* IS_* */
#endif /* NEED_PCI == 1 */
#endif /* !__HWACCESS_H__ */