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Add a bunch of new/tested stuff and various small changes 24

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Tested mainboards:
OK:
 - ASRock G31M-GS
   Reported by Александр Трубицын
 - ASRock G41M-VS3
   Reported by Александр Трубицын
 - ASRock N68C-S UCC
   Reported by Alexey Belyaev
 - ASRock AMCP7AION-HT (ION 330HT(-BD))
   Reported by Stefan Tauner
 - ASUS P5K SE
   Reported by Александр Трубицын
 - ASUS P5KPL-VM
   Reported by Marin Vlah
 - ASUS RAMPAGE III GENE
   Reported by stevessss on IRC
 - GIGABYTE GA-945GM-S2
   Reported by Александр Трубицын
 - GIGABYTE GA-945GCM-S2 (rev. 3.0)
   Reported by Александр Трубицын
 - GIGABYTE GA-965P-S3
   Reported by Александр Трубицын
 - GIGABYTE GA-EG43M-S2H
   Reported by Александр Трубицын
 - GIGABYTE GA-EP31-DS3L (rev. 1.0)
   Reported by Александр Трубицын
 - GIGABYTE GA-G33M-S2
   Reported by Александр Трубицын
 - GIGABYTE GA-G33M-S2L
   Reported by Александр Трубицын
 - GIGABYTE GA-H55M-S2
   Reported by Александр Трубицын
 - GIGABYTE GA-J1900N-D3V
   Reported by Marcos Truchado and Guillermo von Hünefeld
 - GIGABYTE GA-K8NS
   Reported  by nicolae788
 - GIGABYTE GA-M56S-S3
   Reported by Estevo Paz Freire
 - GIGABYTE GA-P31-DS3L
   Reported by Александр Трубицын
 - GIGABYTE GA-P31-S3G
   Reported by Александр Трубицын
 - MSI MS-7336
   Reported by Benjamin Bellec
 - MSI X79A-GD45 (8D) (MS-7760)"
   Reported by mortehu on IRC
 - Supermicro A1SAi-2550F
   Reported by Bernard Grymonpon
 - Supermicro X7DWT
   Reported by Steven Stremciuc

Laptop:
 - ASUS U38N
   Reported by Ultra on IRC
 - Dell Latitude D630
   Reported by Márton Miklós
 - Fujitsu Amilo Xi 3650
   Reported by Elmar Stellnberger
 - Lenovo T400 (whitelisting only)

Chipsets:
 - Mark 8086:1f38 (Intel Avoton/Rangeley) as tested
   Reported by Jeremy Porter and Bernard Grymonpon
 - Add Intel Sunrise Point IDs but no support yet.

Flash chips:
 - Atmel AT45DB321D to PREW (+PREW)
   Reported by The Raven
 - Eon EN25QH32 to PREW (+PREW)
   Reported by Josua Mayer
 - Eon EN25QH64 to PREW (+EW)
   Reported by David s. Alessio
 - GigaDevice GD25LQ64(B) to PREW (+PREW)
   Reported by Greg Tippit
 - Intel 28F001BN/BX-T to PREW (+EW)
   Reported by Lu Xie
 - Micron M25P10-A to PREW (+W)
   Reported by the Raven
 - Micron M25PE40
   Reported by David Wood
 - Micron N25Q128..3E to PREW (+PREW)
   Reported by Miklós Márton
 - Macronix MX25L3273E to PREW (+PREW)
   Reported by Roklobsta on IRC
 - Macronix MX23L6454 to PR (+PR)
   Reported by Steven Honeyman
 - Macronix MX25U6435E/F to PREW (+PREW)
   Reported by Marcos Truchado and Guillermo von Hünefeld
 - PMC Pm25LQ032C to PREW (+EW)
   Reported by Dirk Knop
 - Spansion S25FL016A to PREW (+EW)
   Reported by Márton Miklós
 - Spansion S25FL128S......0 to PREW (+PREW)
   Reported by Jim Houston
 - Spansion S25FL204K to PR (+PR)
   Reported by Thomas Debrunner
 - SST SST49LF016C to PREW (+EW)
   Reported by Steven Stremciuc
 - SST SST39VF040 to PREW (+PREW)
   Reported by Xavier Bourgeois
 - SST SST49LF040B to PREW (+EW)
   Reported by Rikard Åhlund
 - ST M25P10-A to PREW (+W)
   Reported by Martijn Schiedon
 - Winbond W39V040FA to PREW (+EW)
   Reported by Евгений Черкашин
 - Winbond W39V080FA to PREW (+EW)
   Reported by protagonist0 on IRC
 - Winbond W25Q80.W to PREW (+PREW)
   Reported by Miklós Márton
 - Winbond W25X64 to PREW (+REW)
   Reported by Johannes Krampf and Manuel Dejonghe
 - Fix ID of AMIC A25LQ64
   Reported by Roman Titov
 - Fix page size of Spansion S25FL129P......1
   Copy and paste error from the 128S uniform 256kB variant, probably.
 - Add Micron/Numonyx phase-change memory IDs

Miscellaneous:
 - Detect Android target OS.
   No changes are required to build flashrom (excluding programmers
   with NEED_PCI) on Android.
 - Update rayerspi (spipgm) URL
 - Fix max_data_write handling of at45db.
 - Minor refinement of the README
 - Mark board enable for the GA-K8NS variants as tested.
   Tested by "nicolae788" on a board with socket 754.
 - Mark "Multi-system" chassis as non-laptop case.
 - Remove W836xx log requests.
   We got enough (and no one is looking at them for the time being anyway).
 - serprog: improve invalid reply error message, contributed by Urja Rannikko.
 - Remove default include paths for MinGW.
 - Disable implicit rules in the Makefile because we don't need them and they
   just make the build (imperceptibly) slower.
 - Enable our own strnlen() implementation not only on DJGPP but also if
   HAVE_STRNLEN is not defined. This is needed to get older BSDs
   (e.g. NetBSD 6.0, FreeBSD < 8.0) to work.
 - Tiny other stuff.

Corresponding to flashrom svn r1917.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner
2016-01-23 16:16:49 +00:00
parent c2644a3fc1
commit 23e10b8780
20 changed files with 143 additions and 92 deletions
Download Patch File Download Diff File Expand all files Collapse all files

78
flashchips.c
View File

@ -1246,7 +1246,7 @@ const struct flashchip flashchips[] = {
.name = "A25LQ64",
.bustype = BUS_SPI,
.manufacture_id = AMIC_ID_NOPREFIX,
.model_id = AMIC_A25LQ032,
.model_id = AMIC_A25LQ64,
.total_size = 8192,
.page_size = 256,
/* supports SFDP */
@ -2658,7 +2658,7 @@ const struct flashchip flashchips[] = {
.block_erase = spi_erase_at45db_block,
}, /* Although the datasheets describes sectors (which can be write protected)
* there seems to be no erase functions for them.
{
{
.eraseblocks = {
{8 * 528, 1},
{120 * 528, 1},
@ -2688,7 +2688,7 @@ const struct flashchip flashchips[] = {
/* does not support EWSR nor WREN and has no writable status register bits whatsoever */
/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
.feature_bits = FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_at45db,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -4657,7 +4657,7 @@ const struct flashchip flashchips[] = {
/* OTP: 512B total; enter 0x3A */
/* QPI enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -4695,7 +4695,7 @@ const struct flashchip flashchips[] = {
/* OTP: 512B total; enter 0x3A */
/* QPI enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
@ -5630,7 +5630,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -6438,7 +6438,7 @@ const struct flashchip flashchips[] = {
.model_id = INTEL_28F001T,
.total_size = 128,
.page_size = 128 * 1024, /* 112k + 2x4k + 8k */
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
.block_erasers =
@ -6821,7 +6821,7 @@ const struct flashchip flashchips[] = {
.model_id = MACRONIX_MX23L6454,
.total_size = 8192,
.page_size = 256,
.tested = {.probe = NT, .read = NT, .erase = NA, .write = NA},
.tested = {.probe = OK, .read = OK, .erase = NA, .write = NA},
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.write = NULL, /* MX23L6454 is a mask ROM, so it is read-only */
@ -7337,7 +7337,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 64B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -7725,7 +7725,7 @@ const struct flashchip flashchips[] = {
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
/* QPI enable 0x35, disable 0xF5 (0xFF et al. work too) */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -8354,7 +8354,7 @@ const struct flashchip flashchips[] = {
.total_size = 128,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PRE,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -8737,7 +8737,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -9031,7 +9031,7 @@ const struct flashchip flashchips[] = {
},
.printlock = spi_prettyprint_status_register_default_welwip,
.unlock = NULL, /* #WP pin write-protects lower 64kB. */
.write = spi_chip_write_256, /* Page write (similar to PP but allows 0->1 changes) */
.write = spi_chip_write_256, /* Page write supported (similar to PP but allows 0->1 changes) */
.read = spi_chip_read, /* Fast read (0x0B) supported */
.voltage = {2700, 3600},
},
@ -9274,7 +9274,7 @@ const struct flashchip flashchips[] = {
/* supports SFDP */
/* OTP: 64B total; read 0x4B, write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
@ -10069,7 +10069,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 64B total; read 0x4B, write 0xB1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -10658,10 +10658,10 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { {4 * 1024, 128} },
.block_erase = spi_block_erase_d7,
}, {
}, {
.eraseblocks = { {64 * 1024, 8} },
.block_erase = spi_block_erase_d8,
}, {
}, {
.eraseblocks = { {512 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@ -10726,10 +10726,10 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { {256, 1024} },
.block_erase = spi_block_erase_db,
}, {
}, {
.eraseblocks = { {64 * 1024, 4} },
.block_erase = spi_block_erase_d8,
}, {
}, {
.eraseblocks = { {256 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@ -10756,10 +10756,10 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { {256, 2 * 1024} },
.block_erase = spi_block_erase_db,
}, {
}, {
.eraseblocks = { {64 * 1024, 8} },
.block_erase = spi_block_erase_d8,
}, {
}, {
.eraseblocks = { {512 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@ -10787,10 +10787,10 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { {4 * 1024, 128} },
.block_erase = spi_block_erase_d7,
}, {
}, {
.eraseblocks = { {64 * 1024, 8} },
.block_erase = spi_block_erase_d8,
}, {
}, {
.eraseblocks = { {512 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@ -10818,13 +10818,13 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { {4 * 1024, 256} },
.block_erase = spi_block_erase_20,
}, {
}, {
.eraseblocks = { {4 * 1024, 256} },
.block_erase = spi_block_erase_d7,
}, {
}, {
.eraseblocks = { {64 * 1024, 16} },
.block_erase = spi_block_erase_d8,
}, {
}, {
.eraseblocks = { {1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@ -10852,10 +10852,10 @@ const struct flashchip flashchips[] = {
{
.eraseblocks = { {8 * 1024, 128} },
.block_erase = spi_block_erase_d7,
}, {
}, {
.eraseblocks = { {64 * 1024, 16} },
.block_erase = spi_block_erase_d8,
}, {
}, {
.eraseblocks = { {1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@ -10997,7 +10997,7 @@ const struct flashchip flashchips[] = {
.total_size = 2048,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -11084,7 +11084,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PR,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
@ -11398,7 +11398,7 @@ const struct flashchip flashchips[] = {
/* supports 4B addressing */
/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
@ -11517,7 +11517,7 @@ const struct flashchip flashchips[] = {
.manufacture_id = SPANSION_ID,
.model_id = SPANSION_S25FL128,
.total_size = 16384,
.page_size = 512,
.page_size = 256,
/* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
@ -12655,7 +12655,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 1, /* 150 ns */
.block_erasers =
@ -12911,7 +12911,7 @@ const struct flashchip flashchips[] = {
.total_size = 2048,
.page_size = 4 * 1024,
.feature_bits = FEATURE_REGISTERMAP,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_82802ab,
.probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */
.block_erasers =
@ -13035,7 +13035,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 1, /* 150ns */
.block_erasers =
@ -14261,7 +14261,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -14623,7 +14623,7 @@ const struct flashchip flashchips[] = {
.total_size = 8192,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PROBE,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -15182,7 +15182,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =
@ -15419,7 +15419,7 @@ const struct flashchip flashchips[] = {
.total_size = 1024,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 10,
.block_erasers =