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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00

Refactor SuperIO accesses

We had duplicated code under different names and even open-coded some
functions in some places.

wbsio_read/regval -> sio_read wbsio_write/regwrite -> sio_write
wbsio_mask -> sio_mask

board_biostar_p4m80_m4 now uses existing IT87 functions.

Corresponding to flashrom svn r547.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
This commit is contained in:
Carl-Daniel Hailfinger
2009-05-25 23:26:50 +00:00
parent 1fa386262c
commit 24c1a16030
4 changed files with 63 additions and 77 deletions

View File

@ -32,24 +32,24 @@ static uint16_t wbsio_get_spibase(uint16_t port)
uint16_t flashport = 0;
w836xx_ext_enter(port);
id = wbsio_read(port, 0x20);
id = sio_read(port, 0x20);
if (id != 0xa0) {
fprintf(stderr, "\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
goto done;
}
if (0 == (wbsio_read(port, 0x24) & 2)) {
if (0 == (sio_read(port, 0x24) & 2)) {
fprintf(stderr, "\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
goto done;
}
wbsio_write(port, 0x07, 0x06);
if (0 == (wbsio_read(port, 0x30) & 1)) {
sio_write(port, 0x07, 0x06);
if (0 == (sio_read(port, 0x30) & 1)) {
fprintf(stderr, "\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
goto done;
}
flashport = (wbsio_read(port, 0x62) << 8) | wbsio_read(port, 0x63);
flashport = (sio_read(port, 0x62) << 8) | sio_read(port, 0x63);
done:
w836xx_ext_leave(port);