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flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
This patch seems to have originally been from https://patchwork.coreboot.org/patch/4126/ . The most recent version seems to be in OpenEmbedded (commit 503a572) which added support for 16Mbit and 32Mbit variants. The OpenEmbedded patch also makes changes to linux_spi.c to add some debug prints which are omitted in this version. From the original commit message: Differences between SST26 and SST25: 1. The WREN instruction must be executed prior to WRSR [Section 5.31]. There is no EWSR. 2. Block protection bits are no longer in the status register. There is a dedicated 144-bit register [Table 5-6]. The device is write-protected by default. A Global Block-Protection Unlock command unlocks the entire memory [Section 4.1]. Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Signed-off-by: Wei Hu <wei@aristanetworks.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Reviewed-on: https://review.coreboot.org/25962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -102,6 +102,7 @@ int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash);
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int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash);
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/* sfdp.c */
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int probe_spi_sfdp(struct flashctx *flash);
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114
flashchips.c
114
flashchips.c
@ -12916,6 +12916,120 @@ const struct flashchip flashchips[] = {
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.voltage = {2700, 3600},
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},
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{
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.vendor = "SST",
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.name = "SST26VF016B(A)",
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.bustype = BUS_SPI,
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.manufacture_id = SST_ID,
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.model_id = SST_SST26VF016B,
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.total_size = 2048,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_OK_PREW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 512} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = {
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{8 * 1024, 4},
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{32 * 1024, 1},
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{64 * 1024, 30},
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{32 * 1024, 1},
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{8 * 1024, 4},
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},
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {2 * 1024 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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},
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},
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.printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
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.unlock = spi_disable_blockprotect_sst26_global_unprotect,
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "SST",
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.name = "SST26VF032B(A)",
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.bustype = BUS_SPI,
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.manufacture_id = SST_ID,
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.model_id = SST_SST26VF032B,
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.total_size = 4096,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 1024} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = {
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{8 * 1024, 4},
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{32 * 1024, 1},
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{64 * 1024, 62},
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{32 * 1024, 1},
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{8 * 1024, 4},
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},
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {4 * 1024 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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},
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},
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.printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
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.unlock = spi_disable_blockprotect_sst26_global_unprotect,
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "SST",
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.name = "SST26VF064B(A)",
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.bustype = BUS_SPI,
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.manufacture_id = SST_ID,
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.model_id = SST_SST26VF064B,
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.total_size = 8192,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_OK_PREW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 2048} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = {
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{8 * 1024, 4},
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{32 * 1024, 1},
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{64 * 1024, 126},
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{32 * 1024, 1},
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{8 * 1024, 4},
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},
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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},
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},
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.printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
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.unlock = spi_disable_blockprotect_sst26_global_unprotect,
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "SST",
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.name = "SST25WF512",
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@ -699,6 +699,8 @@
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#define SST_SST25VF064C 0x254B
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#define SST_SST26VF016 0x2601
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#define SST_SST26VF032 0x2602
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#define SST_SST26VF016B 0x2641
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#define SST_SST26VF032B 0x2642
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#define SST_SST26VF064B 0x2643
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#define SST_SST27SF512 0xA4
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#define SST_SST27SF010 0xA5
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@ -195,6 +195,19 @@ int spi_disable_blockprotect(struct flashctx *flash)
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return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
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}
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int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash)
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{
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int result = spi_write_enable(flash);
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if (result)
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return result;
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static const unsigned char cmd[] = { 0x98 }; /* ULBPR */
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result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
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if (result)
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msg_cerr("ULBPR failed\n");
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return result;
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}
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/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and
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* protected/locked by bit #7. Useful when bits 4-5 may be non-0). */
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int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash)
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