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flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)

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This patch seems to have originally been from
https://patchwork.coreboot.org/patch/4126/ . The most recent version
seems to be in OpenEmbedded (commit 503a572) which added support for
16Mbit and 32Mbit variants.

The OpenEmbedded patch also makes changes to linux_spi.c to add some
debug prints which are omitted in this version.

From the original commit message:
Differences between SST26 and SST25:
1. The WREN instruction must be executed prior to WRSR [Section 5.31].
   There is no EWSR.
2. Block protection bits are no longer in the status register. There
   is a dedicated 144-bit register [Table 5-6].  The device is
   write-protected by default. A Global Block-Protection Unlock
   command unlocks the entire memory [Section 4.1].

Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219
Signed-off-by: Wei Hu <wei@aristanetworks.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Reviewed-on: https://review.coreboot.org/25962
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wei Hu
2018-04-30 14:02:08 -07:00
committed by David Hendricks
parent 1b365931ea
commit 25584de9d0
4 changed files with 130 additions and 0 deletions
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2
flashchips.h
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@ -699,6 +699,8 @@
#define SST_SST25VF064C 0x254B
#define SST_SST26VF016 0x2601
#define SST_SST26VF032 0x2602
#define SST_SST26VF016B 0x2641
#define SST_SST26VF032B 0x2642
#define SST_SST26VF064B 0x2643
#define SST_SST27SF512 0xA4
#define SST_SST27SF010 0xA5