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https://review.coreboot.org/flashrom.git
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ichspi: Add support for discrete Cannon Lake PCHs
Only minor differences in the Firmware Descriptor, compared to their predecessors. We extend our check on the `ICCRIBA` field in the descriptor to dis- tinguish it from older generation. Alas, the `freq_read` field was repurposed, so we can't use it as sanity check any more. Change-Id: I1c2d1e8916cecd756e7ac1f0ba221d7cc361ba02 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/34072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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@ -41,6 +41,7 @@ ssize_t ich_number_of_regions(const enum ich_chipset cs, const struct ich_desc_c
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case CHIPSET_APOLLO_LAKE:
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return 6;
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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return 16;
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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return 10;
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@ -102,7 +103,7 @@ void prettyprint_ich_chipset(enum ich_chipset cs)
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"5 series Ibex Peak", "6 series Cougar Point", "7 series Panther Point",
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"8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg",
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"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
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"C620 series Lewisburg", "Apollo Lake",
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"C620 series Lewisburg", "300 series Cannon Point", "Apollo Lake",
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};
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if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
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cs = 0;
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@ -194,6 +195,7 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
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case CHIPSET_9_SERIES_WILDCAT_POINT_LP:
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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case CHIPSET_APOLLO_LAKE: {
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uint8_t size_enc;
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if (idx == 0) {
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@ -261,6 +263,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
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return freq_str[0][value];
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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return freq_str[1][value];
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case CHIPSET_APOLLO_LAKE:
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return freq_str[2][value];
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@ -277,6 +280,7 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_
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switch (cs) {
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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case CHIPSET_APOLLO_LAKE:
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has_flill1 = true;
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break;
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@ -394,7 +398,8 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i
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msg_pdbg2("\n");
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msg_pdbg2("--- Details ---\n");
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if (cs == CHIPSET_100_SERIES_SUNRISE_POINT) {
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if (cs == CHIPSET_100_SERIES_SUNRISE_POINT ||
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cs == CHIPSET_300_SERIES_CANNON_POINT) {
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const char *const master_names[] = {
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"BIOS", "ME", "GbE", "unknown", "EC",
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};
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@ -404,14 +409,26 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i
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return;
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}
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msg_pdbg2(" FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9\n");
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size_t num_regions;
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msg_pdbg2(" FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9");
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if (cs == CHIPSET_100_SERIES_SUNRISE_POINT) {
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num_regions = 10;
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msg_pdbg2("\n");
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} else {
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num_regions = 16;
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msg_pdbg2(" RegA RegB RegC RegD RegE RegF\n");
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}
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for (i = 0; i < nm; i++) {
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size_t j;
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msg_pdbg2("%-4s", master_names[i]);
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for (j = 0; j < 10; j++)
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for (j = 0; j < min(num_regions, 12); j++)
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msg_pdbg2(" %c%c ",
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desc->master.mstr[i].read & (1 << j) ? 'r' : ' ',
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desc->master.mstr[i].write & (1 << j) ? 'w' : ' ');
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for (; j < num_regions; j++)
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msg_pdbg2(" %c%c ",
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desc->master.mstr[i].ext_read & (1 << (j - 12)) ? 'r' : ' ',
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desc->master.mstr[i].ext_write & (1 << (j - 12)) ? 'w' : ' ');
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msg_pdbg2("\n");
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}
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} else if (cs == CHIPSET_C620_SERIES_LEWISBURG) {
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@ -915,10 +932,15 @@ static enum ich_chipset guess_ich_chipset_from_content(const struct ich_desc_con
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return CHIPSET_8_SERIES_LYNX_POINT;
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msg_pwarn("Peculiar firmware descriptor, assuming Wildcat Point compatibility.\n");
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return CHIPSET_9_SERIES_WILDCAT_POINT;
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} else if (content->NM == 6) {
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return CHIPSET_C620_SERIES_LEWISBURG;
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} else if (content->ICCRIBA < 0x34) {
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if (content->NM == 6)
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return CHIPSET_C620_SERIES_LEWISBURG;
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else
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return CHIPSET_100_SERIES_SUNRISE_POINT;
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} else {
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return CHIPSET_100_SERIES_SUNRISE_POINT;
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if (content->ICCRIBA > 0x34)
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msg_pwarn("Unknown firmware descriptor, assuming 300 series compatibility.\n");
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return CHIPSET_300_SERIES_CANNON_POINT;
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}
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}
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@ -934,6 +956,9 @@ static enum ich_chipset guess_ich_chipset(const struct ich_desc_content *const c
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const enum ich_chipset guess = guess_ich_chipset_from_content(content);
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switch (guess) {
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case CHIPSET_300_SERIES_CANNON_POINT:
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/* `freq_read` was repurposed, so can't check on it any more. */
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return guess;
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_APOLLO_LAKE:
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@ -1085,6 +1110,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
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case CHIPSET_9_SERIES_WILDCAT_POINT_LP:
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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case CHIPSET_APOLLO_LAKE:
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if (idx == 0) {
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size_enc = desc->component.dens_new.comp1_density;
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@ -1119,6 +1145,7 @@ static uint32_t read_descriptor_reg(enum ich_chipset cs, uint8_t section, uint16
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switch (cs) {
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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case CHIPSET_APOLLO_LAKE:
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mmio_le_writel(control, spibar + PCH100_REG_FDOC);
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return mmio_le_readl(spibar + PCH100_REG_FDOD);
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