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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00

ichspi: Add support for discrete Cannon Lake PCHs

Only minor differences in the Firmware Descriptor, compared to their
predecessors.

We extend our check on the `ICCRIBA` field in the descriptor to dis-
tinguish it from older generation. Alas, the `freq_read` field was
repurposed, so we can't use it as sanity check any more.

Change-Id: I1c2d1e8916cecd756e7ac1f0ba221d7cc361ba02
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Nico Huber
2019-07-04 16:01:51 +02:00
committed by Nico Huber
parent 5ec84b3c09
commit 2a5dfaf140
5 changed files with 87 additions and 32 deletions

View File

@ -170,8 +170,9 @@ struct ich_desc_region {
* Chipset/Generation #FLREGs width (bits)
* ICH8 .. Panther Point/7 5 13
* Lynx Point/8 .. Wildcat Point/9 7 15
* Sunrise Point/100 .. 10 15
* Sunrise Point/100 .. 200 Series 10 15
* Lewisburg/100 .. 16 15
* Cannon Point/300 .. 16 15
*/
union {
uint32_t FLREGs[MAX_NUM_FLREGS]; /* Flash Descriptor Regions */
@ -234,9 +235,10 @@ struct ich_desc_master {
};
/* From Skylake on */
struct {
uint32_t :8,
read :12,
write :12;
uint32_t ext_read :4,
ext_write :4,
read :12,
write :12;
} mstr[MAX_NUM_MASTERS];
};
};