mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00
Revert PCI config space writes on shutdown
This means all chipset enables etc. will be undone on shutdown. Reversible PCI config space writes now use rpci_write_*(). PCI config space writes which are one-shot (e.g. communication via config space) should continue to use the permanent pci_write_* variants. Extend the number of available register_shutdown slots to 32. Corresponding to flashrom svn r1232. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
Carl-Daniel Hailfinger
parent
caf2d42d9a
commit
2bee8cf898
10
atahpt.c
10
atahpt.c
@ -50,7 +50,7 @@ int atahpt_init(void)
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/* Enable flash access. */
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reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS);
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reg32 |= (1 << 24);
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pci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32);
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rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32);
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buses_supported = CHIP_BUSTYPE_PARALLEL;
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@ -59,13 +59,7 @@ int atahpt_init(void)
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int atahpt_shutdown(void)
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{
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uint32_t reg32;
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/* Disable flash access again. */
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reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS);
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reg32 &= ~(1 << 24);
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pci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32);
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/* Flash access is disabled automatically by PCI restore. */
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pci_cleanup(pacc);
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release_io_perms();
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return 0;
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@ -47,7 +47,7 @@ static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
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*/
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tmp = pci_read_byte(dev, 0x47);
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tmp |= 0x46;
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pci_write_byte(dev, 0x47, tmp);
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rpci_write_byte(dev, 0x47, tmp);
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return 0;
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}
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@ -58,7 +58,7 @@ static int enable_flash_sis85c496(struct pci_dev *dev, const char *name)
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tmp = pci_read_byte(dev, 0xd0);
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tmp |= 0xf8;
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pci_write_byte(dev, 0xd0, tmp);
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rpci_write_byte(dev, 0xd0, tmp);
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return 0;
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}
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@ -72,7 +72,7 @@ static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name)
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new = pci_read_byte(dev, 0x40);
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new &= (~0x04); /* No idea why we clear bit 2. */
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new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */
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pci_write_byte(dev, 0x40, new);
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rpci_write_byte(dev, 0x40, new);
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newer = pci_read_byte(dev, 0x40);
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if (newer != new) {
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msg_pinfo("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name);
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@ -160,7 +160,7 @@ static int enable_flash_sis530(struct pci_dev *dev, const char *name)
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new = pci_read_byte(sbdev, 0x45);
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new &= (~0x20);
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new |= 0x4;
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pci_write_byte(sbdev, 0x45, new);
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rpci_write_byte(sbdev, 0x45, new);
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newer = pci_read_byte(sbdev, 0x45);
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if (newer != new) {
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msg_pinfo("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name);
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@ -186,7 +186,7 @@ static int enable_flash_sis540(struct pci_dev *dev, const char *name)
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new = pci_read_byte(sbdev, 0x45);
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new &= (~0x80);
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new |= 0x40;
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pci_write_byte(sbdev, 0x45, new);
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rpci_write_byte(sbdev, 0x45, new);
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newer = pci_read_byte(sbdev, 0x45);
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if (newer != new) {
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msg_pinfo("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name);
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@ -233,7 +233,7 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name)
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if (new == old)
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return 0;
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pci_write_word(dev, xbcs, new);
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rpci_write_word(dev, xbcs, new);
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if (pci_read_word(dev, xbcs) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", xbcs, new, name);
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@ -269,7 +269,7 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name,
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if (new == old)
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return 0;
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pci_write_byte(dev, bios_cntl, new);
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rpci_write_byte(dev, bios_cntl, new);
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if (pci_read_byte(dev, bios_cntl) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", bios_cntl, new, name);
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@ -306,8 +306,8 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
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/* FIXME: Need to undo this on shutdown. */
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msg_pinfo("\nSetting IDSEL=0x%x for top 16 MB", fwh_conf);
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pci_write_long(dev, 0xd0, fwh_conf);
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pci_write_word(dev, 0xd4, fwh_conf);
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rpci_write_long(dev, 0xd0, fwh_conf);
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rpci_write_word(dev, 0xd4, fwh_conf);
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/* FIXME: Decode settings are not changed. */
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} else if (idsel) {
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msg_perr("Error: idsel= specified, but no number given.\n");
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@ -403,7 +403,7 @@ static int enable_flash_poulsbo(struct pci_dev *dev, const char *name)
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new = old & ~1;
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if (new != old)
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pci_write_byte(dev, 0xd9, new);
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rpci_write_byte(dev, 0xd9, new);
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buses_supported = CHIP_BUSTYPE_FWH;
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return 0;
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@ -498,17 +498,6 @@ static int enable_flash_ich10(struct pci_dev *dev, const char *name)
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return enable_flash_ich_dc_spi(dev, name, 10);
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}
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static void via_do_byte_merge(void * arg)
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{
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struct pci_dev * dev = arg;
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uint8_t val;
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msg_pdbg("Re-enabling byte merging\n");
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val = pci_read_byte(dev, 0x71);
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val |= 0x40;
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pci_write_byte(dev, 0x71, val);
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}
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static int via_no_byte_merge(struct pci_dev *dev, const char *name)
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{
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uint8_t val;
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@ -518,8 +507,7 @@ static int via_no_byte_merge(struct pci_dev *dev, const char *name)
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{
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msg_pdbg("Disabling byte merging\n");
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val &= ~0x40;
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pci_write_byte(dev, 0x71, val);
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register_shutdown(via_do_byte_merge, dev);
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rpci_write_byte(dev, 0x71, val);
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}
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return NOT_DONE_YET; /* need to find south bridge, too */
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}
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@ -529,12 +517,12 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
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uint8_t val;
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/* enable ROM decode range (1MB) FFC00000 - FFFFFFFF */
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pci_write_byte(dev, 0x41, 0x7f);
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rpci_write_byte(dev, 0x41, 0x7f);
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/* ROM write enable */
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val = pci_read_byte(dev, 0x40);
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val |= 0x10;
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pci_write_byte(dev, 0x40, val);
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rpci_write_byte(dev, 0x40, val);
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if (pci_read_byte(dev, 0x40) != val) {
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msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n",
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@ -546,7 +534,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
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/* All memory cycles, not just ROM ones, go to LPC. */
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val = pci_read_byte(dev, 0x59);
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val &= ~0x80;
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pci_write_byte(dev, 0x59, val);
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rpci_write_byte(dev, 0x59, val);
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}
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return 0;
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@ -580,12 +568,12 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
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reg8 |= LOWER_ROM_ADDRESS_RANGE;
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reg8 |= UPPER_ROM_ADDRESS_RANGE;
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reg8 |= ROM_WRITE_ENABLE;
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pci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8);
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rpci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8);
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/* Set positive decode on ROM. */
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reg8 = pci_read_byte(dev, DECODE_CONTROL_REG2);
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reg8 |= BIOS_ROM_POSITIVE_DECODE;
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pci_write_byte(dev, DECODE_CONTROL_REG2, reg8);
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rpci_write_byte(dev, DECODE_CONTROL_REG2, reg8);
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reg8 = pci_read_byte(dev, CS5530_RESET_CONTROL_REG);
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if (reg8 & CS5530_ISA_MASTER) {
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@ -649,7 +637,7 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name)
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{
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uint8_t new;
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pci_write_byte(dev, 0x52, 0xee);
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rpci_write_byte(dev, 0x52, 0xee);
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new = pci_read_byte(dev, 0x52);
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@ -670,7 +658,7 @@ static int enable_flash_amd8111(struct pci_dev *dev, const char *name)
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old = pci_read_byte(dev, 0x43);
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new = old | 0xC0;
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if (new != old) {
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pci_write_byte(dev, 0x43, new);
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rpci_write_byte(dev, 0x43, new);
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if (pci_read_byte(dev, 0x43) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x43, new, name);
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}
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@ -681,7 +669,7 @@ static int enable_flash_amd8111(struct pci_dev *dev, const char *name)
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new = old | 0x01;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x40, new);
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rpci_write_byte(dev, 0x40, new);
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if (pci_read_byte(dev, 0x40) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name);
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@ -709,7 +697,7 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name)
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(prot & 0xfffffc00),
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(prot & 0xfffffc00) + ((prot & 0x3ff) << 8));
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prot &= 0xfffffffc;
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pci_write_byte(dev, reg, prot);
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rpci_write_byte(dev, reg, prot);
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prot = pci_read_long(dev, reg);
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if (prot & 0x3)
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msg_perr("SB600 %s%sunprotect failed from %u to %u\n",
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@ -765,11 +753,11 @@ static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
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{
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uint8_t tmp;
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pci_write_byte(dev, 0x92, 0);
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rpci_write_byte(dev, 0x92, 0);
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tmp = pci_read_byte(dev, 0x6d);
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tmp |= 0x01;
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pci_write_byte(dev, 0x6d, tmp);
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rpci_write_byte(dev, 0x6d, tmp);
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return 0;
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}
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@ -781,7 +769,7 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
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old = pci_read_byte(dev, 0x88);
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new = old | 0xc0;
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if (new != old) {
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pci_write_byte(dev, 0x88, new);
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rpci_write_byte(dev, 0x88, new);
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if (pci_read_byte(dev, 0x88) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x88, new, name);
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}
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@ -791,7 +779,7 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
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new = old | 0x01;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x6d, new);
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rpci_write_byte(dev, 0x6d, new);
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if (pci_read_byte(dev, 0x6d) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x6d, new, name);
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@ -835,12 +823,12 @@ static int enable_flash_sb400(struct pci_dev *dev, const char *name)
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/* Enable some SMBus stuff. */
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tmp = pci_read_byte(smbusdev, 0x79);
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tmp |= 0x01;
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pci_write_byte(smbusdev, 0x79, tmp);
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rpci_write_byte(smbusdev, 0x79, tmp);
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/* Change southbridge. */
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tmp = pci_read_byte(dev, 0x48);
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tmp |= 0x21;
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pci_write_byte(dev, 0x48, tmp);
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rpci_write_byte(dev, 0x48, tmp);
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/* Now become a bit silly. */
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tmp = INB(0xc6f);
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@ -862,19 +850,19 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
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/* Set the 0-16 MB enable bits. */
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val = pci_read_byte(dev, 0x88);
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val |= 0xff; /* 256K */
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pci_write_byte(dev, 0x88, val);
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rpci_write_byte(dev, 0x88, val);
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val = pci_read_byte(dev, 0x8c);
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val |= 0xff; /* 1M */
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pci_write_byte(dev, 0x8c, val);
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rpci_write_byte(dev, 0x8c, val);
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wordval = pci_read_word(dev, 0x90);
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wordval |= 0x7fff; /* 16M */
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pci_write_word(dev, 0x90, wordval);
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rpci_write_word(dev, 0x90, wordval);
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old = pci_read_byte(dev, 0x6d);
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new = old | 0x01;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x6d, new);
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rpci_write_byte(dev, 0x6d, new);
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if (pci_read_byte(dev, 0x6d) != new) {
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msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x6d, new, name);
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@ -931,7 +919,7 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name)
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#if 0
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val |= (1 << 6);
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val &= ~(1 << 5);
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pci_write_byte(dev, 0x8a, val);
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rpci_write_byte(dev, 0x8a, val);
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#endif
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if (mcp6x_spi_init(want_spi)) {
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@ -954,11 +942,11 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
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/* Set the 4MB enable bit. */
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val = pci_read_byte(dev, 0x41);
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val |= 0x0e;
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pci_write_byte(dev, 0x41, val);
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rpci_write_byte(dev, 0x41, val);
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val = pci_read_byte(dev, 0x43);
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val |= (1 << 4);
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pci_write_byte(dev, 0x43, val);
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rpci_write_byte(dev, 0x43, val);
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return 0;
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}
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@ -47,7 +47,7 @@ int drkaiser_init(void)
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drkaiser_pcidev);
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/* Write magic register to enable flash write. */
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pci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR,
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rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR,
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PCI_MAGIC_DRKAISER_VALUE);
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/* Map 128KB flash memory window. */
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@ -61,8 +61,7 @@ int drkaiser_init(void)
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int drkaiser_shutdown(void)
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{
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/* Write protect the flash again. */
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pci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, 0);
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/* Flash write is disabled automatically by PCI restore. */
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pci_cleanup(pacc);
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release_io_perms();
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return 0;
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@ -442,7 +442,7 @@ const struct programmer_entry programmer_table[] = {
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{}, /* This entry corresponds to PROGRAMMER_INVALID. */
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};
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#define SHUTDOWN_MAXFN 4
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#define SHUTDOWN_MAXFN 32
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static int shutdown_fn_count = 0;
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struct shutdown_func_data {
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void (*func) (void *data);
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12
gfxnvidia.c
12
gfxnvidia.c
@ -75,7 +75,7 @@ int gfxnvidia_init(void)
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/* Allow access to flash interface (will disable screen). */
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reg32 = pci_read_long(pcidev_dev, 0x50);
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reg32 &= ~(1 << 0);
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pci_write_long(pcidev_dev, 0x50, reg32);
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rpci_write_long(pcidev_dev, 0x50, reg32);
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nvidia_bar = physmap("NVIDIA", io_base_addr, 16 * 1024 * 1024);
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@ -89,13 +89,9 @@ int gfxnvidia_init(void)
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int gfxnvidia_shutdown(void)
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{
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uint32_t reg32;
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/* Disallow access to flash interface (and re-enable screen). */
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reg32 = pci_read_long(pcidev_dev, 0x50);
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reg32 |= (1 << 0);
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pci_write_long(pcidev_dev, 0x50, reg32);
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/* Flash interface access is disabled (and screen enabled) automatically
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* by PCI restore.
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*/
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pci_cleanup(pacc);
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release_io_perms();
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return 0;
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70
pcidev.c
70
pcidev.c
@ -142,3 +142,73 @@ void print_supported_pcidevs(const struct pcidev_status *devs)
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(devs[i].status == NT) ? " (untested)" : "");
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}
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}
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enum pci_write_type {
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pci_write_type_byte,
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pci_write_type_word,
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pci_write_type_long,
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};
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struct undo_pci_write_data {
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struct pci_dev dev;
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int reg;
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enum pci_write_type type;
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union {
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uint8_t bytedata;
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uint16_t worddata;
|
||||
uint32_t longdata;
|
||||
};
|
||||
};
|
||||
|
||||
void undo_pci_write(void *p)
|
||||
{
|
||||
struct undo_pci_write_data *data = p;
|
||||
msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n",
|
||||
data->dev.bus, data->dev.dev, data->dev.func, data->reg);
|
||||
switch (data->type) {
|
||||
case pci_write_type_byte:
|
||||
pci_write_byte(&data->dev, data->reg, data->bytedata);
|
||||
break;
|
||||
case pci_write_type_word:
|
||||
pci_write_word(&data->dev, data->reg, data->worddata);
|
||||
break;
|
||||
case pci_write_type_long:
|
||||
pci_write_long(&data->dev, data->reg, data->longdata);
|
||||
break;
|
||||
}
|
||||
/* p was allocated in register_undo_pci_write. */
|
||||
free(p);
|
||||
}
|
||||
|
||||
#define register_undo_pci_write(a, b, c) \
|
||||
{ \
|
||||
struct undo_pci_write_data *undo_pci_write_data; \
|
||||
undo_pci_write_data = malloc(sizeof(struct undo_pci_write_data)); \
|
||||
undo_pci_write_data->dev = *a; \
|
||||
undo_pci_write_data->reg = b; \
|
||||
undo_pci_write_data->type = pci_write_type_##c; \
|
||||
undo_pci_write_data->c##data = pci_read_##c(dev, reg); \
|
||||
register_shutdown(undo_pci_write, undo_pci_write_data); \
|
||||
}
|
||||
|
||||
#define register_undo_pci_write_byte(a, b) register_undo_pci_write(a, b, byte)
|
||||
#define register_undo_pci_write_word(a, b) register_undo_pci_write(a, b, word)
|
||||
#define register_undo_pci_write_long(a, b) register_undo_pci_write(a, b, long)
|
||||
|
||||
int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data)
|
||||
{
|
||||
register_undo_pci_write_byte(dev, reg);
|
||||
return pci_write_byte(dev, reg, data);
|
||||
}
|
||||
|
||||
int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data)
|
||||
{
|
||||
register_undo_pci_write_word(dev, reg);
|
||||
return pci_write_word(dev, reg, data);
|
||||
}
|
||||
|
||||
int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data)
|
||||
{
|
||||
register_undo_pci_write_long(dev, reg);
|
||||
return pci_write_long(dev, reg, data);
|
||||
}
|
||||
|
||||
@ -212,6 +212,12 @@ struct pcidev_status {
|
||||
};
|
||||
uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs);
|
||||
uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs);
|
||||
/* rpci_write_* are reversible writes. The original PCI config space register
|
||||
* contents will be restored on shutdown.
|
||||
*/
|
||||
int rpci_write_byte(struct pci_dev *dev, int reg, u8 data);
|
||||
int rpci_write_word(struct pci_dev *dev, int reg, u16 data);
|
||||
int rpci_write_long(struct pci_dev *dev, int reg, u32 data);
|
||||
#endif
|
||||
|
||||
/* print.c */
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user