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opaque_master: Mark Opaque chip as tested for WP
Opaque masters, by design, populate the flashchip structure during the execution of their probe function. Therefore any opaque master operation displays a message to the user: "This flash part has status UNTESTED for operations: WP". However, for all the other operations (read, write, erase) opaque masters always mark them as tested. Thus, align WP as marked tested inline with other opaque chip operations. BUG=b:258755442 TEST=the following does not display untested message: 1) flashrom -p dummy:size=8388608,emulate=VARIABLE_SIZE 2) flashrom -p internal (on Intel device) Original-Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/69842 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Original-Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Original-Reviewed-by: Felix Singer <felixsinger@posteo.net> Change-Id: I5ae4cb49eb0abc6ab26cfe2f3359e4e50dd4fd4f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/69997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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@ -145,7 +145,7 @@ static int probe_variable_size(struct flashctx *flash)
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msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
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flash->chip->total_size);
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flash->chip->tested = TEST_OK_PREW;
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flash->chip->tested = TEST_OK_PREWB;
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if (emu_data->erase_to_zero)
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flash->chip->feature_bits |= FEATURE_ERASED_ZERO;
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2
ichspi.c
2
ichspi.c
@ -1485,7 +1485,7 @@ static int ich_hwseq_probe(struct flashctx *flash)
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msg_cdbg("In that range are %d erase blocks with %d B each.\n",
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size_high / erase_size_high, erase_size_high);
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}
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flash->chip->tested = TEST_OK_PREW;
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flash->chip->tested = TEST_OK_PREWB;
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return 1;
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}
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@ -115,7 +115,7 @@ static int nicintel_ee_probe_i210(struct flashctx *flash)
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/* Emulated eeprom has a fixed size of 4 KB */
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flash->chip->total_size = 4;
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flash->chip->page_size = flash->chip->total_size * 1024;
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flash->chip->tested = TEST_OK_PREW;
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flash->chip->tested = TEST_OK_PREWB;
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flash->chip->gran = write_gran_1byte_implicit_erase;
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flash->chip->block_erasers->eraseblocks[0].size = flash->chip->page_size;
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flash->chip->block_erasers->eraseblocks[0].count = 1;
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@ -146,7 +146,7 @@ static int nicintel_ee_probe_82580(struct flashctx *flash)
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}
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flash->chip->page_size = EE_PAGE_MASK + 1;
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flash->chip->tested = TEST_OK_PREW;
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flash->chip->tested = TEST_OK_PREWB;
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flash->chip->gran = write_gran_1byte_implicit_erase;
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flash->chip->block_erasers->eraseblocks[0].size = (EE_PAGE_MASK + 1);
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flash->chip->block_erasers->eraseblocks[0].count = (flash->chip->total_size * 1024) / (EE_PAGE_MASK + 1);
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