1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 22:43:17 +02:00

Every SPI host controller implemented its own way to read flash chips

This was partly due to a design problem in the abstraction layer.

There should be exactly two different functions for reading SPI chips:
- memory mapped reads
- SPI command reads.

Each of them should be contained in a separate function, optionally
taking parameters where needed.

This patch solves the problems mentioned above, shortens the code and
makes the code logic a lot more obvious.

Since open-coding the min() function leads to errors, include it in this
patch as well.

Corresponding to flashrom svn r589.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Carl-Daniel Hailfinger
2009-06-13 12:04:03 +00:00
parent 8b2f46b878
commit 38a059d6ef
7 changed files with 42 additions and 63 deletions

View File

@ -41,14 +41,8 @@ uint8_t *sb600_spibar;
int sb600_spi_read(struct flashchip *flash, uint8_t *buf)
{
int rc = 0, i;
int total_size = flash->total_size * 1024;
int page_size = 8;
for (i = 0; i < total_size / page_size; i++)
spi_nbyte_read(i * page_size, (void *)(buf + i * page_size),
page_size);
return rc;
/* Maximum read length is 8 bytes. */
return spi_read_chunked(flash, buf, 8);
}
uint8_t sb600_read_status_register(void)