mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 15:12:36 +02:00
Remove vendorid parameter from pcidev_init()
Simplify pcidev_init by killing the vendorid parameter which was pretty useless anyway since it was present in the pcidevs parameter as well. This also allows us to handle multiple programmers with different vendor IDs in the same driver. Fix compilation of flashrom with only the nicrealtek driver. Corresponding to flashrom svn r1274. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
parent
c6f71462c9
commit
40446eef1b
3
atahpt.c
3
atahpt.c
@ -44,8 +44,7 @@ int atahpt_init(void)
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_HPT, PCI_BASE_ADDRESS_4,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt);
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ata_hpt);
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/* Enable flash access. */
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/* Enable flash access. */
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reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS);
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reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS);
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@ -43,8 +43,7 @@ int drkaiser_init(void)
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get_io_perms();
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get_io_perms();
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addr = pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2,
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addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev);
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drkaiser_pcidev);
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/* Write magic register to enable flash write. */
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/* Write magic register to enable flash write. */
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rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR,
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rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR,
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19
flashrom.c
19
flashrom.c
@ -61,7 +61,6 @@ enum programmer programmer =
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#endif
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#endif
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#if CONFIG_NICREALTEK == 1
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#if CONFIG_NICREALTEK == 1
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PROGRAMMER_NICREALTEK
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PROGRAMMER_NICREALTEK
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PROGRAMMER_NICREALTEK2
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#endif
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#endif
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#if CONFIG_NICNATSEMI == 1
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#if CONFIG_NICNATSEMI == 1
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PROGRAMMER_NICNATSEMI
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PROGRAMMER_NICNATSEMI
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@ -182,7 +181,9 @@ const struct programmer_entry programmer_table[] = {
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#if CONFIG_NICREALTEK == 1
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#if CONFIG_NICREALTEK == 1
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{
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{
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/* This programmer works for Realtek RTL8139 and SMC 1211. */
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.name = "nicrealtek",
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.name = "nicrealtek",
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//.name = "nicsmc1211",
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.init = nicrealtek_init,
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.init = nicrealtek_init,
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.shutdown = nicrealtek_shutdown,
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.shutdown = nicrealtek_shutdown,
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.map_flash_region = fallback_map,
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.map_flash_region = fallback_map,
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@ -197,22 +198,6 @@ const struct programmer_entry programmer_table[] = {
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.chip_writen = fallback_chip_writen,
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.chip_writen = fallback_chip_writen,
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.delay = internal_delay,
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.delay = internal_delay,
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},
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},
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{
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.name = "nicsmc1211",
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.init = nicsmc1211_init,
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.shutdown = nicrealtek_shutdown,
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.map_flash_region = fallback_map,
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.unmap_flash_region = fallback_unmap,
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.chip_readb = nicrealtek_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = nicrealtek_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.delay = internal_delay,
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},
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#endif
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#endif
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#if CONFIG_NICNATSEMI == 1
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#if CONFIG_NICNATSEMI == 1
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@ -66,8 +66,7 @@ int gfxnvidia_init(void)
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_NVIDIA, PCI_BASE_ADDRESS_0,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia);
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gfx_nvidia);
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io_base_addr += 0x300000;
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io_base_addr += 0x300000;
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msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr);
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msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr);
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@ -59,8 +59,7 @@ int nic3com_init(void)
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{
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{
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_3COM, PCI_BASE_ADDRESS_0,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com);
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nics_3com);
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id = pcidev_dev->device_id;
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id = pcidev_dev->device_id;
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@ -144,8 +144,7 @@ int nicintel_spi_init(void)
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_INTEL, PCI_BASE_ADDRESS_0,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi);
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nics_intel_spi);
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nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash",
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nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash",
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io_base_addr, 4096);
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io_base_addr, 4096);
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@ -39,8 +39,7 @@ int nicnatsemi_init(void)
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{
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{
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_NATSEMI, PCI_BASE_ADDRESS_0,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi);
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nics_natsemi);
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buses_supported = CHIP_BUSTYPE_PARALLEL;
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buses_supported = CHIP_BUSTYPE_PARALLEL;
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19
nicrealtek.c
19
nicrealtek.c
@ -32,10 +32,6 @@
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const struct pcidev_status nics_realtek[] = {
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const struct pcidev_status nics_realtek[] = {
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{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
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{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
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{},
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};
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const struct pcidev_status nics_realteksmc1211[] = {
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{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
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{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
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{},
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{},
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};
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};
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@ -44,20 +40,7 @@ int nicrealtek_init(void)
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{
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{
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek);
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nics_realtek);
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buses_supported = CHIP_BUSTYPE_PARALLEL;
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return 0;
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}
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int nicsmc1211_init(void)
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{
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0,
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nics_realteksmc1211);
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buses_supported = CHIP_BUSTYPE_PARALLEL;
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buses_supported = CHIP_BUSTYPE_PARALLEL;
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@ -120,8 +120,7 @@ int ogp_spi_init(void)
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get_io_perms();
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get_io_perms();
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io_base_addr = pcidev_init(PCI_VENDOR_ID_OGP, PCI_BASE_ADDRESS_0,
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi);
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ogp_spi);
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ogp_spibar = physmap("OGP registers", io_base_addr, 4096);
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ogp_spibar = physmap("OGP registers", io_base_addr, 4096);
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9
pcidev.c
9
pcidev.c
@ -188,8 +188,7 @@ uintptr_t pcidev_validate(struct pci_dev *dev, int bar,
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return 0;
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return 0;
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}
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}
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uintptr_t pcidev_init(uint16_t vendor_id, int bar,
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uintptr_t pcidev_init(int bar, const struct pcidev_status *devs)
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const struct pcidev_status *devs)
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{
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{
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struct pci_dev *dev;
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struct pci_dev *dev;
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struct pci_filter filter;
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struct pci_filter filter;
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@ -203,8 +202,7 @@ uintptr_t pcidev_init(uint16_t vendor_id, int bar,
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pci_scan_bus(pacc); /* We want to get the list of devices */
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pci_scan_bus(pacc); /* We want to get the list of devices */
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pci_filter_init(pacc, &filter);
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pci_filter_init(pacc, &filter);
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/* Filter by vendor and also bb:dd.f (if supplied by the user). */
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/* Filter by bb:dd.f (if supplied by the user). */
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filter.vendor = vendor_id;
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pcidev_bdf = extract_programmer_param("pci");
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pcidev_bdf = extract_programmer_param("pci");
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if (pcidev_bdf != NULL) {
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if (pcidev_bdf != NULL) {
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if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) {
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if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) {
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@ -216,6 +214,9 @@ uintptr_t pcidev_init(uint16_t vendor_id, int bar,
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for (dev = pacc->devices; dev; dev = dev->next) {
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for (dev = pacc->devices; dev; dev = dev->next) {
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if (pci_filter_match(&filter, dev)) {
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if (pci_filter_match(&filter, dev)) {
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/* FIXME: We should count all matching devices, not
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* just those with a valid BAR.
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*/
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if ((addr = pcidev_validate(dev, bar, devs)) != 0) {
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if ((addr = pcidev_validate(dev, bar, devs)) != 0) {
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curaddr = addr;
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curaddr = addr;
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pcidev_dev = dev;
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pcidev_dev = dev;
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3
print.c
3
print.c
@ -249,9 +249,6 @@ void print_supported(void)
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printf("\nSupported devices for the %s programmer:\n",
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printf("\nSupported devices for the %s programmer:\n",
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programmer_table[PROGRAMMER_NICREALTEK].name);
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programmer_table[PROGRAMMER_NICREALTEK].name);
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print_supported_pcidevs(nics_realtek);
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print_supported_pcidevs(nics_realtek);
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printf("\nSupported devices for the %s programmer:\n",
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programmer_table[PROGRAMMER_NICREALTEK2].name);
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print_supported_pcidevs(nics_realteksmc1211);
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#endif
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#endif
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#if CONFIG_NICNATSEMI == 1
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#if CONFIG_NICNATSEMI == 1
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printf("\nSupported devices for the %s programmer:\n",
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printf("\nSupported devices for the %s programmer:\n",
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@ -279,7 +279,6 @@ void print_supported_wiki(void)
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#endif
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#endif
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#if CONFIG_NICREALTEK == 1
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#if CONFIG_NICREALTEK == 1
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print_supported_pcidevs_wiki(nics_realtek);
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print_supported_pcidevs_wiki(nics_realtek);
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print_supported_pcidevs_wiki(nics_realteksmc1211);
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#endif
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#endif
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#if CONFIG_NICNATSEMI == 1
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#if CONFIG_NICNATSEMI == 1
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print_supported_pcidevs_wiki(nics_natsemi);
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print_supported_pcidevs_wiki(nics_natsemi);
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@ -36,7 +36,6 @@ enum programmer {
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#endif
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#endif
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#if CONFIG_NICREALTEK == 1
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#if CONFIG_NICREALTEK == 1
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PROGRAMMER_NICREALTEK,
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PROGRAMMER_NICREALTEK,
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PROGRAMMER_NICREALTEK2,
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#endif
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#endif
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#if CONFIG_NICNATSEMI == 1
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#if CONFIG_NICNATSEMI == 1
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PROGRAMMER_NICNATSEMI,
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PROGRAMMER_NICNATSEMI,
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@ -220,7 +219,7 @@ struct pcidev_status {
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const char *device_name;
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const char *device_name;
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};
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};
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uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct pcidev_status *devs);
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uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct pcidev_status *devs);
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uintptr_t pcidev_init(uint16_t vendor_id, int bar, const struct pcidev_status *devs);
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uintptr_t pcidev_init(int bar, const struct pcidev_status *devs);
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/* rpci_write_* are reversible writes. The original PCI config space register
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/* rpci_write_* are reversible writes. The original PCI config space register
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* contents will be restored on shutdown.
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* contents will be restored on shutdown.
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*/
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*/
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@ -384,12 +383,10 @@ extern const struct pcidev_status drkaiser_pcidev[];
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/* nicrealtek.c */
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/* nicrealtek.c */
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#if CONFIG_NICREALTEK == 1
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#if CONFIG_NICREALTEK == 1
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int nicrealtek_init(void);
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int nicrealtek_init(void);
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int nicsmc1211_init(void);
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int nicrealtek_shutdown(void);
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int nicrealtek_shutdown(void);
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void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
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void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
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uint8_t nicrealtek_chip_readb(const chipaddr addr);
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uint8_t nicrealtek_chip_readb(const chipaddr addr);
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extern const struct pcidev_status nics_realtek[];
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extern const struct pcidev_status nics_realtek[];
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extern const struct pcidev_status nics_realteksmc1211[];
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#endif
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#endif
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/* nicnatsemi.c */
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/* nicnatsemi.c */
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2
satamv.c
2
satamv.c
@ -67,7 +67,7 @@ int satamv_init(void)
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/* No need to check for errors, pcidev_init() will not return in case
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/* No need to check for errors, pcidev_init() will not return in case
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* of errors.
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* of errors.
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*/
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*/
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addr = pcidev_init(0x11ab, PCI_BASE_ADDRESS_0, satas_mv);
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addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv);
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mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000);
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mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000);
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if (mv_bar == ERROR_PTR)
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if (mv_bar == ERROR_PTR)
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