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Add a board enable for Asus P4P800-VM

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Only list the memory controller PCI IDs because the only other subsystem
mentioned is used by network and sound interfaces both of which can be
turned off in BIOS.
Tested on a board rev 1.85.

Corresponding to flashrom svn r1273.

Signed-off-by: Diego Elio Pettenò <flameeyes@gmail.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
This commit is contained in:
Diego Elio Pettenò 2011-03-06 22:52:55 +00:00 committed by Carl-Daniel Hailfinger
parent 67f28140de
commit c6f71462c9
1 changed files with 2 additions and 0 deletions
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2
board_enable.c
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@ -1458,6 +1458,7 @@ static int intel_ich_gpio19_raise(void)
* - ASUS P4C800-E Deluxe: socket478 + 875P + ICH5
* - ASUS P4P800: Intel socket478 + 865PE + ICH5R
* - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R
* - ASUS P4P800-VM: Intel socket478 + 865PE + ICH5R
* - ASUS P5GD1 Pro: Intel LGA 775 + 915P + ICH6R
* - ASUS P5GDC Deluxe: Intel socket775 + 915P + ICH6R
* - ASUS P5PE-VM: Intel LGA775 + 865G + ICH5
@ -1936,6 +1937,7 @@ const struct board_pciid_enable board_pciid_enables[] = {
{0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise},
{0x8086, 0x2570, 0x1043, 0x80F2, 0x8086, 0x24D5, 0x1043, 0x80F3, NULL, NULL, NULL, "ASUS", "P4P800", 0, NT, intel_ich_gpio21_raise},
{0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise},
{0x8086, 0x2570, 0x1043, 0x80A5, 0x8086, 0x24d0, 0, 0, NULL, NULL, NULL, "ASUS", "P4P800-VM", 0, OK, intel_ich_gpio21_raise},
{0x1039, 0x0651, 0x1043, 0x8081, 0x1039, 0x0962, 0, 0, NULL, NULL, NULL, "ASUS", "P4SC-E", 0, OK, it8707f_write_enable_2e},
{0x8086, 0x2570, 0x1043, 0x80A5, 0x105A, 0x24D3, 0x1043, 0x80A6, NULL, NULL, NULL, "ASUS", "P4SD-LA", 0, NT, intel_ich_gpio32_raise},
{0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x5513, 0x1043, 0x8087, NULL, NULL, NULL, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e},