openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00
Code Issues Releases Wiki Activity

Allow the user to override FWH IDSEL on ICH6 and later

Browse Source 
Usage:
flashrom -p internal=fwh_idsel=0

Corresponding to flashrom svn r685.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Log:
flashrom v0.9.0-r670
coreboot table found at 0xcf7f3c00.
Vendor ID: KONTRON, part ID: 986LCD-M
Found chipset "Intel ICH7/ICH7R", enabling flash write...
Setting IDSEL=0 for top 8 MBOK.
This chipset supports the following protocols: LPC,FWH.
Disabling flash write protection for board "Kontron 986LCD-M"... OK.
Calibrating delay loop... OK.
Found chip "SST SST49LF016C" (2048 KB, FWH) at physical address
0xffe00000.
No operations were specified.

Acked-by: Chris Kinney <cmkinne@sandia.gov>
This commit is contained in:
Carl-Daniel Hailfinger 2009-08-13 23:23:37 +00:00
parent 204b076df7
commit 4449868623
1 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
chipset_enable.c
View File

@ -203,6 +203,7 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
{
uint32_t fwh_conf;
int i;
char *idsel = NULL;
/* Ignore all legacy ranges below 1 MB. */
/* FWH_SEL1 */
@ -232,6 +233,19 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
(0xff0 + i) * 0x100000,
(fwh_conf >> i) & 0x1 ? "en" : "dis");
if (programmer_param)
idsel = strstr(programmer_param, "fwh_idsel=");
if (idsel) {
idsel += strlen("fwh_idsel=");
fwh_conf = (uint32_t)strtoul(idsel, NULL, 0);
/* FIXME: Need to undo this on shutdown. */
printf("\nSetting IDSEL=0x%x for top 16 MB", fwh_conf);
pci_write_long(dev, 0xd0, fwh_conf);
pci_write_word(dev, 0xd4, fwh_conf);
}
return enable_flash_ich(dev, name, 0xdc);
}