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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

internal.c: laptop_ok global state can become stale

Craask and similar DUT's are erroneously probing random second chips.

```
Found chipset "Intel Alder Lake-N".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x003a0000-0x00ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x0039ffff) is read-write.
OK.
Found Winbond flash chip "W25Q128.V..M" (16384 kB, Programmer-specific) on host.
Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
Found MoselVitelic flash chip "V29C51000T" (64 kB, Parallel) mapped at physical address 0x00000000ffff0000.
```

This seems to be due to `laptop_ok` becoming a stale global state
after the first operation leading to probing on unrelated buses.

Therefore unconditionally reset the global state upon entry into
the internal driver.

BUG=b:260518132,b:260151917
TEST=Craask reportly no longer finds duplicate chip.

Original-Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70026
Original-Reviewed-by: Sam McNally <sammc@google.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
(cherry picked from commit c2af789c5ea5821f61fac5532d81e94742e0e00b)

Change-Id: I2c00c351904307eeb1488c5dfaffc91d6468ee25
Signed-off-by: Evan Benn <evanbenn@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Edward O'Callaghan 2022-11-28 11:20:44 +11:00 committed by Anastasia Klimchuk
parent d867f0fbe8
commit 4bfe5dd682

View File

@ -211,6 +211,9 @@ static int internal_init(const struct programmer_cfg *cfg)
if (ret)
return ret;
/* Unconditionally reset global state from previous operation. */
laptop_ok = false;
/* Default to Parallel/LPC/FWH flash devices. If a known host controller
* is found, the host controller init routine sets the
* internal_buses_supported bitfield.