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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 14:42:36 +02:00

rayer_spi: Add pinout for Atmel STK200/300

Corresponding to flashrom svn r1755.

Signed-off-by: Maksim Kuleshov <mmcx@mail.ru>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Acked-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Maksim Kuleshov 2013-10-02 01:22:02 +00:00 committed by Stefan Tauner
parent 3647b2d5ed
commit 4dab5c1e07
2 changed files with 30 additions and 2 deletions

View File

@ -759,8 +759,8 @@ parameter to specify the cable type with the
syntax where
.B model
can be
.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, or " xilinx \
" for the Xilinx Parallel Cable III (DLC 5)."
.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \
STK200/300, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)."
.sp
More information about the RayeR hardware is available at
.nh

View File

@ -82,10 +82,23 @@ static const struct rayer_pinout altera_byteblastermv = {
.shutdown = byteblaster_shutdown,
};
static void stk200_preinit(const void *);
static int stk200_shutdown(void *);
static const struct rayer_pinout atmel_stk200 = {
.cs_bit = 7,
.sck_bit = 4,
.mosi_bit = 5,
.miso_bit = 6,
.preinit = stk200_preinit,
.shutdown = stk200_shutdown,
};
static const struct rayer_programmer rayer_spi_types[] = {
{"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
{"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
{"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv},
{"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200},
{0},
};
@ -221,6 +234,21 @@ static int byteblaster_shutdown(void *data){
return 0;
}
static void stk200_preinit(const void *data) {
msg_pdbg("stk200_init\n");
/* Assert #EN signals, set LED signal. */
lpt_outbyte = (1 << 6) ;
OUTB(lpt_outbyte, lpt_iobase);
}
static int stk200_shutdown(void *data) {
msg_pdbg("stk200_shutdown\n");
/* Assert #EN signals, clear LED signal. */
lpt_outbyte = (1 << 2) | (1 << 3);
OUTB(lpt_outbyte, lpt_iobase);
return 0;
}
#else
#error PCI port I/O access is not supported on this architecture yet.
#endif