Update the ITE IT8500 EC support to match the current state of the flashrom-chromium tree

This code has been deployed and tested to work on the Cr-48.
There are a few caveats, though:
- The boot BIOS straps register must be modified to select LPC. This
  can be done with the "select_bbs.sh" script (Install iotools at
  http://code.google.com/p/iotools/ before using select_bbs).
- It is very important to disable power management daemons before
  running flashrom on this EC. I commented out the brute force method
  we use in the Chromium OS branch that disables powerd, since IIRC
  Carl-Daniel has a better approach in the works.
- Due to dependencies which may be introduced by the OEM/ODM EC
  firmware, the code is not guaranteed to work for anything other than
  the Cr-48.

Corresponding to flashrom svn r1263.

Signed-off-by: David Hendricks <dhendrix@google.com>

Carl-Daniel comments:
Code is not hooked up yet because probing needs to be sorted out.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

programmer.h

@@ -523,6 +523,7 @@ enum spi_controller {
 #if defined(__i386__) || defined(__x86_64__)
 	SPI_CONTROLLER_ICH7,
 	SPI_CONTROLLER_ICH9,
+	SPI_CONTROLLER_IT85XX,
 	SPI_CONTROLLER_IT87XX,
 	SPI_CONTROLLER_SB600,
 	SPI_CONTROLLER_VIA,
@@ -583,6 +584,14 @@ int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len
 int ich_spi_send_multicommand(struct spi_command *cmds);
 #endif
 
+/* it85spi.c */
+struct superio probe_superio_ite85xx(void);
+int it85xx_spi_init(void);
+int it85xx_shutdown(void);
+int it85xx_probe_spi_flash(const char *name);
+int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+			const unsigned char *writearr, unsigned char *readarr);
+
 /* it87spi.c */
 void enter_conf_mode_ite(uint16_t port);
 void exit_conf_mode_ite(uint16_t port);