openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00
Code Issues Releases Wiki Activity

nicintel: remove unused rget_io_perms()

Browse Source 
The nicintel programmer does not use x86 IO Ports. Remove the dependency
to it.

Change-Id: Ibe609ff8f8fdbdf2a7de8e1922325ca4ad56a9e7
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60844
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Thomas Heijligen 2022-01-06 14:44:39 +01:00 committed by Nico Huber
parent 583c15fc65
commit 50847804a9
2 changed files with 0 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -128,7 +128,6 @@ DEPENDS_ON_X86_PORT_IO := \
CONFIG_ATAPROMISE \
CONFIG_INTERNAL \
CONFIG_NIC3COM \
CONFIG_NICINTEL \
CONFIG_NICINTEL_EEPROM \
CONFIG_NICINTEL_SPI \
CONFIG_NICNATSEMI \

7
nicintel.c
View File

@ -19,7 +19,6 @@
#include "flash.h"
#include "programmer.h"
#include "hwaccess.h"
#include "hwaccess_x86_io.h"
#include "hwaccess_physmap.h"
#include "platform/pci.h"
@ -71,12 +70,6 @@ static int nicintel_init(void)
struct pci_dev *dev = NULL;
uintptr_t addr;
/* Needed only for PCI accesses on some platforms.
* FIXME: Refactor that into get_mem_perms/rget_io_perms/get_pci_perms?
*/
if (rget_io_perms())
return 1;
/* FIXME: BAR2 is not available if the device uses the CardBus function. */
dev = pcidev_init(nics_intel, PCI_BASE_ADDRESS_2);
if (!dev)