mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 23:22:37 +02:00
4BA: Basic support for 4-bytes addressing mode extensions
If flash chip is switched to 4-bytes addressing mode then all
read/erase/program instructions will be switched from 3-bytes mode
to 4-bytes mode. Then well known instructions like 03h (Read),
02h (Program) and 20h,52h,D8h (Erase) will become one byte longer
and accept 4-bytes address instead of 3-bytes.
This patch provides support for well known instructions in 4-bytes
addressing mode. Also here is the code to enter 4-bytes addressing
mode by execute the instruction B7h (Enter 4-bytes mode).
Patched files
-------------
chipdrivers.h
+ added functions declarations for spi4ba.c
flash.h
+ feature definitions added
Makefile
+ added spi4ba.c
Added files
-----------
spi4ba.h
+ definitions for 4-bytes addressing JEDEC commands
+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)
spi4ba.c
+ functions for enter 4-bytes addressing mode
+ functions for read/write/erase in 4-bytes addressing mode
Change-Id: Ie72e2a89cd75fb4d09f48e81c4c1d927c317b7a7
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013199.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-on: https://review.coreboot.org/20513
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Boris Baykov
David Hendricks
parent
f4d7772cee
commit
50a5660c9c
2
Makefile
2
Makefile
@ -514,7 +514,7 @@ endif
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CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \
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sst28sf040.o 82802ab.o \
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sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \
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opaque.o sfdp.o en29lv640b.o at45db.o
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spi4ba.o opaque.o sfdp.o en29lv640b.o at45db.o
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###############################################################################
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# Library code.
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@ -195,4 +195,14 @@ int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int
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int probe_en29lv640b(struct flashctx *flash);
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int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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/* spi4ba.c */
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int spi_enter_4ba_b7(struct flashctx *flash);
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int spi_enter_4ba_b7_we(struct flashctx *flash);
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int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte);
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int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
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int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
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int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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#endif /* !__CHIPDRIVERS_H__ */
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3
flash.h
3
flash.h
@ -119,6 +119,9 @@ enum write_granularity {
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#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
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#define FEATURE_OTP (1 << 8)
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#define FEATURE_QPI (1 << 9)
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/* Feature bits used for 4-bytes addressing mode */
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#define FEATURE_4BA_SUPPORT (1 << 10)
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#define FEATURE_4BA_ONLY (1 << 11)
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enum test_state {
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OK = 0,
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327
spi4ba.c
Normal file
327
spi4ba.c
Normal file
@ -0,0 +1,327 @@
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/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2014 Boris Baykov
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* SPI chip driver functions for 4-bytes addressing
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*/
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#include <string.h>
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#include "flash.h"
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#include "chipdrivers.h"
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#include "spi.h"
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#include "programmer.h"
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#include "spi4ba.h"
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/* #define MSG_TRACE_4BA_FUNCS 1 */
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#ifdef MSG_TRACE_4BA_FUNCS
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#define msg_trace(...) print(MSG_DEBUG, __VA_ARGS__)
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#else
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#define msg_trace(...)
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#endif
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/* Enter 4-bytes addressing mode (without sending WREN before) */
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int spi_enter_4ba_b7(struct flashctx *flash)
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{
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const unsigned char cmd[JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_ENTER_4_BYTE_ADDR_MODE };
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msg_trace("-> %s\n", __func__);
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/* Switch to 4-bytes addressing mode */
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return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
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}
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/* Enter 4-bytes addressing mode with sending WREN before */
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int spi_enter_4ba_b7_we(struct flashctx *flash)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_ENTER_4_BYTE_ADDR_MODE },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s\n", __func__);
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/* Switch to 4-bytes addressing mode */
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution\n", __func__);
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}
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return result;
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}
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/* Program one flash byte from 4-bytes addressing mode */
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int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr,
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uint8_t databyte)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_BYTE_PROGRAM,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff),
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databyte
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X)\n", __func__, addr);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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}
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return result;
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}
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/* Program flash bytes from 4-bytes addressing mode */
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int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr,
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const uint8_t *bytes, unsigned int len)
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{
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int result;
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unsigned char cmd[(JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1 + 256] = {
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JEDEC_BYTE_PROGRAM,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr >> 0) & 0xff
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};
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = (JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1 + len,
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.writearr = cmd,
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
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if (!len) {
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msg_cerr("%s called for zero-length write\n", __func__);
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return 1;
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}
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if (len > 256) {
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msg_cerr("%s called for too long a write\n", __func__);
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return 1;
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}
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memcpy(&cmd[(JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1], bytes, len);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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}
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return result;
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}
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/* Read flash bytes from 4-bytes addressing mode */
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int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr,
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uint8_t *bytes, unsigned int len)
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{
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const unsigned char cmd[JEDEC_READ_OUTSIZE + 1] = {
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JEDEC_READ,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr >> 0) & 0xff
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};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1);
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/* Send Read */
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return spi_send_command(flash, sizeof(cmd), len, cmd, bytes);
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}
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/* Erases 4 KB of flash from 4-bytes addressing mode */
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int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_SE_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_SE,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 15-800 ms, so wait in 10 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(10 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Erases 32 KB of flash from 4-bytes addressing mode */
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int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_52_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_BE_52,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(100 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Erases 64 KB of flash from 4-bytes addressing mode */
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int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_D8_OUTSIZE + 1,
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.writearr = (const unsigned char[]){
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JEDEC_BE_D8,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(100 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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54
spi4ba.h
Normal file
54
spi4ba.h
Normal file
@ -0,0 +1,54 @@
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/*
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* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2014 Boris Baykov
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
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|
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/*
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* JEDEC flash chips instructions for 4-bytes addressing
|
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* SPI chip driver functions for 4-bytes addressing
|
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*/
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#ifndef __SPI_4BA_H__
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#define __SPI_4BA_H__ 1
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/* Enter 4-byte Address Mode */
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#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7
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#define JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE 0x01
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#define JEDEC_ENTER_4_BYTE_ADDR_MODE_INSIZE 0x00
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/* Exit 4-byte Address Mode */
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#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9
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#define JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE 0x01
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#define JEDEC_EXIT_4_BYTE_ADDR_MODE_INSIZE 0x00
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/* enter 4-bytes addressing mode */
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int spi_enter_4ba_b7(struct flashctx *flash);
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int spi_enter_4ba_b7_we(struct flashctx *flash);
|
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|
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/* read/write flash bytes in 4-bytes addressing mode */
|
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int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte);
|
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int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
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int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
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/* erase flash bytes in 4-bytes addressing mode */
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int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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|
||||
#endif /* __SPI_4BA_H__ */
|
||||
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