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4BA: Basic support for 4-bytes addressing mode extensions
If flash chip is switched to 4-bytes addressing mode then all read/erase/program instructions will be switched from 3-bytes mode to 4-bytes mode. Then well known instructions like 03h (Read), 02h (Program) and 20h,52h,D8h (Erase) will become one byte longer and accept 4-bytes address instead of 3-bytes. This patch provides support for well known instructions in 4-bytes addressing mode. Also here is the code to enter 4-bytes addressing mode by execute the instruction B7h (Enter 4-bytes mode). Patched files ------------- chipdrivers.h + added functions declarations for spi4ba.c flash.h + feature definitions added Makefile + added spi4ba.c Added files ----------- spi4ba.h + definitions for 4-bytes addressing JEDEC commands + functions declarations from spi4ba.c (same as in chipdrivers.h, just to see) spi4ba.c + functions for enter 4-bytes addressing mode + functions for read/write/erase in 4-bytes addressing mode Change-Id: Ie72e2a89cd75fb4d09f48e81c4c1d927c317b7a7 Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014 [clg: ported from https://www.flashrom.org/pipermail/flashrom/2015-January/013199.html ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-on: https://review.coreboot.org/20513 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
David Hendricks

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commit
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3
flash.h
3
flash.h
@ -119,6 +119,9 @@ enum write_granularity {
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#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
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#define FEATURE_OTP (1 << 8)
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#define FEATURE_QPI (1 << 9)
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/* Feature bits used for 4-bytes addressing mode */
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#define FEATURE_4BA_SUPPORT (1 << 10)
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#define FEATURE_4BA_ONLY (1 << 11)
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enum test_state {
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OK = 0,
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