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flashchips.c: enable WP for 7 entries of MX chips
These weren't split: * MX25L3206E/MX25L3208E Tested: https://github.com/Dasharo/flashrom/pull/8 * MX25L6405 * MX25L6405D * MX25L6406E/MX25L6408E Tested: https://github.com/Dasharo/flashrom/pull/8 MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F was split into: * MX25L6436E/MX25L6445E/MX25L6465E - security register - WPS - tested: https://github.com/Dasharo/flashrom/pull/8 * MX25L6473E - security register - OTP TB bit in CONFIG/STATUS2 (0x15 opcode) - WPS * MX25L6473F - NO security register - OTP TB bit in CONFIG/STATUS2 (0x15 opcode) - NO WPS Change-Id: Ib3db9d39ffacd3e9e44de92c6cfb6c3ecc8615bd Tested-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Sergii Dmytruk
Anastasia Klimchuk
parent
f6b486da14
commit
56ebda5341
137
flashchips.c
137
flashchips.c
@ -8918,7 +8918,7 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* OTP: 64B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_OK_PREW,
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.tested = TEST_OK_PREWB,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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@ -8945,6 +8945,13 @@ const struct flashchip flashchips[] = {
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B) and dual I/O supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
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.cmp = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like CMP */
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},
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.decode_range = DECODE_RANGE_SPI25_BIT_CMP,
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},
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{
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@ -9171,6 +9178,12 @@ const struct flashchip flashchips[] = {
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B) supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
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},
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.decode_range = DECODE_RANGE_SPI25,
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},
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{
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@ -9207,6 +9220,13 @@ const struct flashchip flashchips[] = {
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B), dual I/O read (0xBB) supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
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.cmp = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like CMP */
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},
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.decode_range = DECODE_RANGE_SPI25_BIT_CMP,
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},
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{
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@ -9220,7 +9240,7 @@ const struct flashchip flashchips[] = {
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/* MX25L6406E supports SFDP */
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/* OTP: 06E 64B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_OK_PREW,
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.tested = TEST_OK_PREWB,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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@ -9247,11 +9267,18 @@ const struct flashchip flashchips[] = {
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B), dual I/O read supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
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.cmp = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like CMP */
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},
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.decode_range = DECODE_RANGE_SPI25_BIT_CMP,
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},
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{
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.vendor = "Macronix",
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.name = "MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F",
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.name = "MX25L6436E/MX25L6445E/MX25L6465E",
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.bustype = BUS_SPI,
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.manufacture_id = MACRONIX_ID,
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.model_id = MACRONIX_MX25L6405,
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@ -9259,7 +9286,54 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 512B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_SCUR,
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.tested = TEST_OK_PREWB,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 2048} },
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.block_erase = SPI_BLOCK_ERASE_20,
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}, {
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.eraseblocks = { {32 * 1024, 256} },
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.block_erase = SPI_BLOCK_ERASE_52,
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}, {
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.eraseblocks = { {64 * 1024, 128} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_60,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
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.unlock = spi_disable_blockprotect_bp3_srwd,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
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.wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */
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},
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.decode_range = DECODE_RANGE_SPI25_2X_BLOCK,
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},
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{
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.vendor = "Macronix",
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.name = "MX25L6473E",
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.bustype = BUS_SPI,
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.manufacture_id = MACRONIX_ID,
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.model_id = MACRONIX_MX25L6405,
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.total_size = 8192,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 512B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_SCUR,
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.tested = TEST_OK_PREW,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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@ -9287,6 +9361,61 @@ const struct flashchip flashchips[] = {
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
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.tb = {CONFIG, 3, OTP},
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.wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */
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},
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.decode_range = DECODE_RANGE_SPI25,
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},
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{
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.vendor = "Macronix",
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.name = "MX25L6473F",
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.bustype = BUS_SPI,
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.manufacture_id = MACRONIX_ID,
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.model_id = MACRONIX_MX25L6405,
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.total_size = 8192,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 512B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2,
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.tested = TEST_OK_PREW,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 2048} },
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.block_erase = SPI_BLOCK_ERASE_20,
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}, {
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.eraseblocks = { {32 * 1024, 256} },
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.block_erase = SPI_BLOCK_ERASE_52,
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}, {
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.eraseblocks = { {64 * 1024, 128} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_60,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
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.unlock = spi_disable_blockprotect_bp3_srwd,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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.reg_bits =
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{
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.srp = {STATUS1, 7, RW},
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
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.tb = {CONFIG, 3, OTP},
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},
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.decode_range = DECODE_RANGE_SPI25,
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},
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{
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