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Code Issues Releases Wiki Activity

bitbang: Extend bitbang_spi_master functions to accept spi data

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This way every bitbang spi master has access to its own spi data,
and can use this data in all its functions.

This patch only changes the signatures of functions.

BUG=b:185191942
TEST=builds

Change-Id: Id5722a43ce20feeed62630ad80e14df7744f9c02
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
Anastasia Klimchuk 2021-05-26 09:54:08 +10:00 committed by Edward O'Callaghan
parent 30815fc370
commit 5f5eaeb7fa
8 changed files with 52 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
bitbang_spi.c
View File

@ -24,44 +24,44 @@
/* Note that CS# is active low, so val=0 means the chip is active. */
static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
{
master->set_cs(val);
master->set_cs(val, NULL);
}
static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
{
master->set_sck(val);
master->set_sck(val, NULL);
}
static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
{
if (master->request_bus)
master->request_bus();
master->request_bus(NULL);
}
static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
{
if (master->release_bus)
master->release_bus();
master->release_bus(NULL);
}
static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi)
{
if (master->set_sck_set_mosi) {
master->set_sck_set_mosi(sck, mosi);
master->set_sck_set_mosi(sck, mosi, NULL);
return;
}
master->set_sck(sck);
master->set_mosi(mosi);
master->set_sck(sck, NULL);
master->set_mosi(mosi, NULL);
}
static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck)
{
if (master->set_sck_get_miso)
return master->set_sck_get_miso(sck);
return master->set_sck_get_miso(sck, NULL);
master->set_sck(sck);
return master->get_miso();
master->set_sck(sck, NULL);
return master->get_miso(NULL);
}
static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master)

10
developerbox_spi.c
View File

@ -94,27 +94,27 @@ static void cp210x_gpio_set(uint8_t val, uint8_t mask)
msg_perr("Failed to read GPIO pins (%s)\n", libusb_error_name(res));
}
static void cp210x_bitbang_set_cs(int val)
static void cp210x_bitbang_set_cs(int val, void *spi_data)
{
cp210x_gpio_set(val << DEVELOPERBOX_SPI_CS, 1 << DEVELOPERBOX_SPI_CS);
}
static void cp210x_bitbang_set_sck(int val)
static void cp210x_bitbang_set_sck(int val, void *spi_data)
{
cp210x_gpio_set(val << DEVELOPERBOX_SPI_SCK, 1 << DEVELOPERBOX_SPI_SCK);
}
static void cp210x_bitbang_set_mosi(int val)
static void cp210x_bitbang_set_mosi(int val, void *spi_data)
{
cp210x_gpio_set(val << DEVELOPERBOX_SPI_MOSI, 1 << DEVELOPERBOX_SPI_MOSI);
}
static int cp210x_bitbang_get_miso(void)
static int cp210x_bitbang_get_miso(void *spi_data)
{
return !!(cp210x_gpio_get() & (1 << DEVELOPERBOX_SPI_MISO));
}
static void cp210x_bitbang_set_sck_set_mosi(int sck, int mosi)
static void cp210x_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data)
{
cp210x_gpio_set(sck << DEVELOPERBOX_SPI_SCK | mosi << DEVELOPERBOX_SPI_MOSI,
1 << DEVELOPERBOX_SPI_SCK | 1 << DEVELOPERBOX_SPI_MOSI);

12
mcp6x_spi.c
View File

@ -41,7 +41,7 @@ static void *mcp6x_spibar = NULL;
/* Cached value of last GPIO state. */
static uint8_t mcp_gpiostate;
static void mcp6x_request_spibus(void)
static void mcp6x_request_spibus(void *spi_data)
{
mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
mcp_gpiostate |= 1 << MCP6X_SPI_REQUEST;
@ -54,34 +54,34 @@ static void mcp6x_request_spibus(void)
mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
}
static void mcp6x_release_spibus(void)
static void mcp6x_release_spibus(void *spi_data)
{
mcp_gpiostate &= ~(1 << MCP6X_SPI_REQUEST);
mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
}
static void mcp6x_bitbang_set_cs(int val)
static void mcp6x_bitbang_set_cs(int val, void *spi_data)
{
mcp_gpiostate &= ~(1 << MCP6X_SPI_CS);
mcp_gpiostate |= (val << MCP6X_SPI_CS);
mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
}
static void mcp6x_bitbang_set_sck(int val)
static void mcp6x_bitbang_set_sck(int val, void *spi_data)
{
mcp_gpiostate &= ~(1 << MCP6X_SPI_SCK);
mcp_gpiostate |= (val << MCP6X_SPI_SCK);
mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
}
static void mcp6x_bitbang_set_mosi(int val)
static void mcp6x_bitbang_set_mosi(int val, void *spi_data)
{
mcp_gpiostate &= ~(1 << MCP6X_SPI_MOSI);
mcp_gpiostate |= (val << MCP6X_SPI_MOSI);
mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
}
static int mcp6x_bitbang_get_miso(void)
static int mcp6x_bitbang_get_miso(void *spi_data)
{
mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
return (mcp_gpiostate >> MCP6X_SPI_MISO) & 0x1;

12
nicintel_spi.c
View File

@ -107,7 +107,7 @@ const struct dev_entry nics_intel_spi[] = {
{0},
};
static void nicintel_request_spibus(void)
static void nicintel_request_spibus(void *spi_data)
{
uint32_t tmp;
@ -119,7 +119,7 @@ static void nicintel_request_spibus(void)
while (!(pci_mmio_readl(nicintel_spibar + FLA) & BIT(FL_GNT))) ;
}
static void nicintel_release_spibus(void)
static void nicintel_release_spibus(void *spi_data)
{
uint32_t tmp;
@ -128,7 +128,7 @@ static void nicintel_release_spibus(void)
pci_mmio_writel(tmp, nicintel_spibar + FLA);
}
static void nicintel_bitbang_set_cs(int val)
static void nicintel_bitbang_set_cs(int val, void *spi_data)
{
uint32_t tmp;
@ -138,7 +138,7 @@ static void nicintel_bitbang_set_cs(int val)
pci_mmio_writel(tmp, nicintel_spibar + FLA);
}
static void nicintel_bitbang_set_sck(int val)
static void nicintel_bitbang_set_sck(int val, void *spi_data)
{
uint32_t tmp;
@ -148,7 +148,7 @@ static void nicintel_bitbang_set_sck(int val)
pci_mmio_writel(tmp, nicintel_spibar + FLA);
}
static void nicintel_bitbang_set_mosi(int val)
static void nicintel_bitbang_set_mosi(int val, void *spi_data)
{
uint32_t tmp;
@ -158,7 +158,7 @@ static void nicintel_bitbang_set_mosi(int val)
pci_mmio_writel(tmp, nicintel_spibar + FLA);
}
static int nicintel_bitbang_get_miso(void)
static int nicintel_bitbang_get_miso(void *spi_data)
{
uint32_t tmp;

12
ogp_spi.c
View File

@ -49,32 +49,32 @@ const struct dev_entry ogp_spi[] = {
{0},
};
static void ogp_request_spibus(void)
static void ogp_request_spibus(void *spi_data)
{
pci_mmio_writel(1, ogp_spibar + ogp_reg_sel);
}
static void ogp_release_spibus(void)
static void ogp_release_spibus(void *spi_data)
{
pci_mmio_writel(0, ogp_spibar + ogp_reg_sel);
}
static void ogp_bitbang_set_cs(int val)
static void ogp_bitbang_set_cs(int val, void *spi_data)
{
pci_mmio_writel(val, ogp_spibar + ogp_reg__ce);
}
static void ogp_bitbang_set_sck(int val)
static void ogp_bitbang_set_sck(int val, void *spi_data)
{
pci_mmio_writel(val, ogp_spibar + ogp_reg_sck);
}
static void ogp_bitbang_set_mosi(int val)
static void ogp_bitbang_set_mosi(int val, void *spi_data)
{
pci_mmio_writel(val, ogp_spibar + ogp_reg_siso);
}
static int ogp_bitbang_get_miso(void)
static int ogp_bitbang_get_miso(void *spi_data)
{
uint32_t tmp;

14
pony_spi.c
View File

@ -56,7 +56,7 @@ static int pony_negate_mosi = 0;
/* Pins for slave->master direction */
static int pony_negate_miso = 0;
static void pony_bitbang_set_cs(int val)
static void pony_bitbang_set_cs(int val, void *spi_data)
{
if (pony_negate_cs)
val ^= 1;
@ -64,7 +64,7 @@ static void pony_bitbang_set_cs(int val)
sp_set_pin(PIN_TXD, val);
}
static void pony_bitbang_set_sck(int val)
static void pony_bitbang_set_sck(int val, void *spi_data)
{
if (pony_negate_sck)
val ^= 1;
@ -72,7 +72,7 @@ static void pony_bitbang_set_sck(int val)
sp_set_pin(PIN_RTS, val);
}
static void pony_bitbang_set_mosi(int val)
static void pony_bitbang_set_mosi(int val, void *spi_data)
{
if (pony_negate_mosi)
val ^= 1;
@ -80,7 +80,7 @@ static void pony_bitbang_set_mosi(int val)
sp_set_pin(PIN_DTR, val);
}
static int pony_bitbang_get_miso(void)
static int pony_bitbang_get_miso(void *spi_data)
{
int tmp = sp_get_pin(PIN_CTS);
@ -192,9 +192,9 @@ int pony_spi_init(void)
/*
* Detect if there is a compatible hardware programmer connected.
*/
pony_bitbang_set_cs(1);
pony_bitbang_set_sck(1);
pony_bitbang_set_mosi(1);
pony_bitbang_set_cs(1, NULL);
pony_bitbang_set_sck(1, NULL);
pony_bitbang_set_mosi(1, NULL);
switch (type) {
case TYPE_AJAWE:

16
programmer.h
View File

@ -182,15 +182,15 @@ int programmer_shutdown(void);
struct bitbang_spi_master {
/* Note that CS# is active low, so val=0 means the chip is active. */
void (*set_cs) (int val);
void (*set_sck) (int val);
void (*set_mosi) (int val);
int (*get_miso) (void);
void (*request_bus) (void);
void (*release_bus) (void);
void (*set_cs) (int val, void *spi_data);
void (*set_sck) (int val, void *spi_data);
void (*set_mosi) (int val, void *spi_data);
int (*get_miso) (void *spi_data);
void (*request_bus) (void *spi_data);
void (*release_bus) (void *spi_data);
/* optional functions to optimize xfers */
void (*set_sck_set_mosi) (int sck, int mosi);
int (*set_sck_get_miso) (int sck);
void (*set_sck_set_mosi) (int sck, int mosi, void *spi_data);
int (*set_sck_get_miso) (int sck, void *spi_data);
/* Length of half a clock period in usecs. */
unsigned int half_period;
};

8
rayer_spi.c
View File

@ -160,28 +160,28 @@ static const struct rayer_programmer rayer_spi_types[] = {
static const struct rayer_pinout *pinout = NULL;
static void rayer_bitbang_set_cs(int val)
static void rayer_bitbang_set_cs(int val, void *spi_data)
{
lpt_outbyte &= ~(1 << pinout->cs_bit);
lpt_outbyte |= (val << pinout->cs_bit);
OUTB(lpt_outbyte, lpt_iobase);
}
static void rayer_bitbang_set_sck(int val)
static void rayer_bitbang_set_sck(int val, void *spi_data)
{
lpt_outbyte &= ~(1 << pinout->sck_bit);
lpt_outbyte |= (val << pinout->sck_bit);
OUTB(lpt_outbyte, lpt_iobase);
}
static void rayer_bitbang_set_mosi(int val)
static void rayer_bitbang_set_mosi(int val, void *spi_data)
{
lpt_outbyte &= ~(1 << pinout->mosi_bit);
lpt_outbyte |= (val << pinout->mosi_bit);
OUTB(lpt_outbyte, lpt_iobase);
}
static int rayer_bitbang_get_miso(void)
static int rayer_bitbang_get_miso(void *spi_data)
{
uint8_t tmp;