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flashchips: Add support for MXIC MX25L1636E

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The MX25L1636E has been tested by ch341a programmer : read, write,
erase and wp.

We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.

MX25L1636E datasheet is available at the following URL:
https://www.mxic.com.tw/Lists/Datasheet/Attachments/8596/MX25L1636E,%203V,%2016Mb,%20v1.3.pdf

Change-Id: I415e2d6c89d3d59ba44e22753001c6f69421c39d
Signed-off-by: DanielZhang <danielzhang@mxic.com.cn>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/81835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
DanielZhang
2024-04-12 12:01:10 +08:00
committed by Anastasia Klimchuk
parent 138387aa67
commit 61b26a5fe8
1 changed files with 10 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
flashchips.c
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@@ -9417,15 +9417,15 @@ const struct flashchip flashchips[] = {
{
.vendor = "Macronix",
.name = "MX25L1635E",
.name = "MX25L1635E/MX25L1636E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L1635E,
.total_size = 2048,
.page_size = 256,
/* OTP: 64B total; enter 0xB1, exit 0xC1 */
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -9449,6 +9449,13 @@ const struct flashchip flashchips[] = {
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
},
.decode_range = DECODE_RANGE_SPI25,
},
{