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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

flashchips: Add support for MXIC MX25R8035F

The MX25R8035F has been tested by ch341a programmer : read, write,
erase and wp.

We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.

MX25R8035F datasheet is available at the following URL:
https://www.macronix.com/Lists/Datasheet/Attachments/8749/MX25R8035F,%20Wide%20Range,%208Mb,%20v1.6.pdf

Change-Id: Iec244ffc29278c1f8c3ae47d17af2c4fe5fbe498
Signed-off-by: DanielZhang <danielzhang@mxic.com.cn>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/81837
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
DanielZhang 2024-04-12 15:17:00 +08:00 committed by Anastasia Klimchuk
parent 85f14efe06
commit 6f47cc1737
2 changed files with 48 additions and 0 deletions

View File

@ -10211,6 +10211,53 @@ const struct flashchip flashchips[] = {
.voltage = {1650, 3600},
},
{
.vendor = "Macronix",
.name = "MX25R8035F",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25R8035F,
.total_size = 1024,
.page_size = 256,
/* OTP: 1024B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 256} },
.block_erase = SPI_BLOCK_ERASE_20,
}, {
.eraseblocks = { {32 * 1024, 32} },
.block_erase = SPI_BLOCK_ERASE_52,
}, {
.eraseblocks = { {64 * 1024, 16} },
.block_erase = SPI_BLOCK_ERASE_D8,
}, {
.eraseblocks = { {1 * 1024 * 1024, 1} },
.block_erase = SPI_BLOCK_ERASE_60,
}, {
.eraseblocks = { {1 * 1024 * 1024, 1} },
.block_erase = SPI_BLOCK_ERASE_C7,
}
},
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */
.unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
.voltage = {1650, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {CONFIG, 3, OTP}
},
.decode_range = DECODE_RANGE_SPI25,
},
{
.vendor = "Macronix",
.name = "MX25V4035F",

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@ -540,6 +540,7 @@
#define MACRONIX_MX25R1635F 0x2815
#define MACRONIX_MX25R3235F 0x2816
#define MACRONIX_MX25R6435F 0x2817
#define MACRONIX_MX25R8035F 0x2814
#define MACRONIX_MX29F001B 0x19
#define MACRONIX_MX29F001T 0x18