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Add support for Intel Wildcat Point PCH

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The Wildcat Point PCH can be paired with Broadwell or Haswell.
This patch was essentially backported from ChromiumOS commit 9bd2af8.

Corresponding to flashrom svn r1845.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Duncan Laurie 2014-08-20 15:39:38 +00:00 committed by Stefan Tauner
parent 4095ed797f
commit 823096e527
5 changed files with 27 additions and 4 deletions
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19
chipset_enable.c
View File

@ -594,7 +594,7 @@ static void enable_flash_ich_handle_gcs(struct pci_dev *dev, enum ich_chipset ic
static const char *const straps_names_tunnel_creek[] = { "SPI", "LPC" };
static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" };
static const char *const straps_names_pch567[] = { "LPC", "reserved", "PCI", "SPI" };
static const char *const straps_names_pch8_baytrail[] = { "LPC", "reserved", "reserved", "SPI" };
static const char *const straps_names_pch89_baytrail[] = { "LPC", "reserved", "reserved", "SPI" };
static const char *const straps_names_pch8_lp[] = { "SPI", "LPC" };
static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" };
@ -623,8 +623,9 @@ static void enable_flash_ich_handle_gcs(struct pci_dev *dev, enum ich_chipset ic
straps_names = straps_names_pch567;
break;
case CHIPSET_8_SERIES_LYNX_POINT:
case CHIPSET_9_SERIES_WILDCAT_POINT:
case CHIPSET_BAYTRAIL:
straps_names = straps_names_pch8_baytrail;
straps_names = straps_names_pch89_baytrail;
break;
case CHIPSET_8_SERIES_LYNX_POINT_LP:
straps_names = straps_names_pch8_lp;
@ -776,6 +777,12 @@ static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name)
return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc);
}
/* Wildcat Point */
static int enable_flash_pch9(struct pci_dev *dev, const char *name)
{
return enable_flash_ich_spi(dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc);
}
/* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley.
* These have a distinctly different behavior compared to other Intel chipsets and hence are handled separately.
*
@ -1759,6 +1766,14 @@ const struct penable chipset_enables[] = {
{0x8086, 0x8d5d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb},
{0x8086, 0x8d5e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb},
{0x8086, 0x8d5f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb},
{0x8086, 0x9cc1, NT, "Intel", "Haswell U Sample", enable_flash_pch9},
{0x8086, 0x9cc2, NT, "Intel", "Broadwell U Sample", enable_flash_pch9},
{0x8086, 0x9cc3, NT, "Intel", "Broadwell U Premium", enable_flash_pch9},
{0x8086, 0x9cc5, NT, "Intel", "Broadwell U Base", enable_flash_pch9},
{0x8086, 0x9cc6, NT, "Intel", "Broadwell Y Sample", enable_flash_pch9},
{0x8086, 0x9cc7, NT, "Intel", "Broadwell Y Premium", enable_flash_pch9},
{0x8086, 0x9cc9, NT, "Intel", "Broadwell Y Base", enable_flash_pch9},
{0x8086, 0x9ccb, NT, "Intel", "Broadwell H", enable_flash_pch9},
#endif
{0},
};

5
ich_descriptors.c
View File

@ -141,7 +141,8 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
case CHIPSET_8_SERIES_LYNX_POINT:
case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG: {
case CHIPSET_8_SERIES_WELLSBURG:
case CHIPSET_9_SERIES_WILDCAT_POINT: {
uint8_t size_enc;
if (idx == 0) {
size_enc = desc->component.new.comp1_density;
@ -184,6 +185,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG:
case CHIPSET_9_SERIES_WILDCAT_POINT:
return freq_str[value];
case CHIPSET_ICH_UNKNOWN:
default:
@ -825,6 +827,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG:
case CHIPSET_9_SERIES_WILDCAT_POINT:
if (idx == 0) {
size_enc = desc->component.new.comp1_density;
} else {

2
ich_descriptors.h
View File

@ -117,7 +117,7 @@ struct ich_desc_component {
* Wildcat Point/9: 50 ?? (multi I/O) ? ?:?, ?:?
*/
struct {
uint32_t :17,
uint32_t :17,
freq_read :3,
fastread :1,
freq_fastread :3,

1
programmer.h
View File

@ -603,6 +603,7 @@ enum ich_chipset {
CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
CHIPSET_8_SERIES_LYNX_POINT_LP,
CHIPSET_8_SERIES_WELLSBURG,
CHIPSET_9_SERIES_WILDCAT_POINT,
};
/* ichspi.c */

4
util/ich_descriptors_tool/ich_descriptors_tool.c
View File

@ -123,6 +123,7 @@ static void usage(char *argv[], char *error)
"\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
"\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
"\t- \"8\" or \"lynx\" for Intel's 8 series chipsets.\n"
"\t- \"9\" or \"wildcat\" for Intel's 9 series chipsets.\n"
"If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
"the GbE blob that is required to initialize the GbE are also dumped to files.\n",
argv[0], argv[0]);
@ -205,6 +206,9 @@ int main(int argc, char *argv[])
cs = CHIPSET_8_SERIES_LYNX_POINT;
else if ((strcmp(csn, "silvermont") == 0))
cs = CHIPSET_BAYTRAIL;
else if ((strcmp(csn, "9") == 0) ||
(strcmp(csn, "wildcat") == 0))
cs = CHIPSET_9_SERIES_WILDCAT_POINT;
}
ret = read_ich_descriptors_from_dump(buf, len, &desc);