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Code Issues Releases Wiki Activity

Various nicrealtek fixes

Browse Source 
- Add missing entries for 'flashrom -L' output and wiki output.

 - Add missing entries in the manpage.

 - nicrealtek.c: Coding style fixes and cosmetics.

Corresponding to flashrom svn r1011.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann
2010-05-24 17:39:14 +00:00
parent b3fe2fc819
commit 829ed84e1b
4 changed files with 36 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
nicrealtek.c
View File

@ -30,34 +30,34 @@
#define BIOS_ROM_DATA 0xD7
struct pcidev_status nics_realtek[] = {
{0x10ec, 0x8139, OK, "Realtek","rtl8139b/c PCI 10/100 Mbps"},
{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
{},
};
struct pcidev_status nics_realteksmc1211[] = {
{0x1113, 0x1211, OK, "SMC", "SMC 1211TX rtl8139 clone 10/100 Mbps"},
{}
{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
{},
};
int nicrealtek_init(void)
{
get_io_perms();
io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0,
nics_realtek, programmer_param);
nics_realtek, programmer_param);
buses_supported = CHIP_BUSTYPE_PARALLEL;
return 0;
}
int nicsmc1211_init(void)
{
get_io_perms();
io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0,
nics_realteksmc1211, programmer_param);
nics_realteksmc1211, programmer_param);
buses_supported = CHIP_BUSTYPE_PARALLEL;
return 0;
@ -73,17 +73,23 @@ int nicrealtek_shutdown(void)
void nicrealtek_chip_writeb(uint8_t val, chipaddr addr)
{
OUTL(((uint32_t)addr &0x01FFFF)|0x0A0000| (val << 24), io_base_addr + BIOS_ROM_ADDR);
OUTL(((uint32_t)addr &0x01FFFF)|0x1E0000| (val << 24), io_base_addr + BIOS_ROM_ADDR);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x0A0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
}
uint8_t nicrealtek_chip_readb(const chipaddr addr)
{
uint8_t val=INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24), io_base_addr + BIOS_ROM_ADDR);
val=INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), io_base_addr + BIOS_ROM_ADDR);
return val ;
uint8_t val;
val = INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
val = INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
return val;
}