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Code Issues Releases Wiki Activity

Various nicrealtek fixes

Browse Source 
- Add missing entries for 'flashrom -L' output and wiki output.

 - Add missing entries in the manpage.

 - nicrealtek.c: Coding style fixes and cosmetics.

Corresponding to flashrom svn r1011.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann 2010-05-24 17:39:14 +00:00
parent b3fe2fc819
commit 829ed84e1b
4 changed files with 36 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
flashrom.8
View File

@ -152,6 +152,10 @@ Specify the programmer device. Currently supported are:
.sp .sp
.BR "* nic3com" " (for flash ROMs on 3COM network cards)" .BR "* nic3com" " (for flash ROMs on 3COM network cards)"
.sp .sp
.BR "* nicrealtek" " (for flash ROMs on Realtek network cards)"
.sp
.BR "* nicsmc1211" " (for flash ROMs on RTL8139-compatible SMC2 network cards)"
.sp
.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)" .BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
.sp .sp
.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)" .BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
@ -276,7 +280,7 @@ in any order.
Example: Example:
.B "flashrom -p dummy:lpc,fwh" .B "flashrom -p dummy:lpc,fwh"
.TP .TP
.BR "nic3com" , " gfxnvidia" , " satasii " and " atahpt " programmers .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " gfxnvidia" , " satasii " and " atahpt " programmers
These programmers have an option to specify the PCI address of the card These programmers have an option to specify the PCI address of the card
your want to use, which must be specified if more than one card supported your want to use, which must be specified if more than one card supported
by the selected programmer is installed in your system. The syntax is by the selected programmer is installed in your system. The syntax is

40
nicrealtek.c
View File

@ -30,34 +30,34 @@
#define BIOS_ROM_DATA 0xD7 #define BIOS_ROM_DATA 0xD7
struct pcidev_status nics_realtek[] = { struct pcidev_status nics_realtek[] = {
{0x10ec, 0x8139, OK, "Realtek","rtl8139b/c PCI 10/100 Mbps"}, {0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
{}, {},
}; };
struct pcidev_status nics_realteksmc1211[] = { struct pcidev_status nics_realteksmc1211[] = {
{0x1113, 0x1211, OK, "SMC", "SMC 1211TX rtl8139 clone 10/100 Mbps"}, {0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
{} {},
}; };
int nicrealtek_init(void) int nicrealtek_init(void)
{ {
get_io_perms(); get_io_perms();
io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0, io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0,
nics_realtek, programmer_param); nics_realtek, programmer_param);
buses_supported = CHIP_BUSTYPE_PARALLEL; buses_supported = CHIP_BUSTYPE_PARALLEL;
return 0; return 0;
} }
int nicsmc1211_init(void) int nicsmc1211_init(void)
{ {
get_io_perms(); get_io_perms();
io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0, io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0,
nics_realteksmc1211, programmer_param); nics_realteksmc1211, programmer_param);
buses_supported = CHIP_BUSTYPE_PARALLEL; buses_supported = CHIP_BUSTYPE_PARALLEL;
return 0; return 0;
@ -73,17 +73,23 @@ int nicrealtek_shutdown(void)
void nicrealtek_chip_writeb(uint8_t val, chipaddr addr) void nicrealtek_chip_writeb(uint8_t val, chipaddr addr)
{ {
OUTL(((uint32_t)addr &0x01FFFF)|0x0A0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); OUTL(((uint32_t)addr & 0x01FFFF) | 0x0A0000 | (val << 24),
OUTL(((uint32_t)addr &0x01FFFF)|0x1E0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); io_base_addr + BIOS_ROM_ADDR);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
} }
uint8_t nicrealtek_chip_readb(const chipaddr addr) uint8_t nicrealtek_chip_readb(const chipaddr addr)
{ {
uint8_t val=INB(io_base_addr + BIOS_ROM_DATA); uint8_t val;
OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24), io_base_addr + BIOS_ROM_ADDR);
val=INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), io_base_addr + BIOS_ROM_ADDR);
return val ;
val = INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
val = INB(io_base_addr + BIOS_ROM_DATA);
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
return val;
} }

4
print.c
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@ -238,6 +238,10 @@ void print_supported(void)
#if NIC3COM_SUPPORT == 1 #if NIC3COM_SUPPORT == 1
print_supported_pcidevs(nics_3com); print_supported_pcidevs(nics_3com);
#endif #endif
#if NICREALTEK_SUPPORT == 1
print_supported_pcidevs(nics_realtek);
print_supported_pcidevs(nics_realteksmc1211);
#endif
#if GFXNVIDIA_SUPPORT == 1 #if GFXNVIDIA_SUPPORT == 1
print_supported_pcidevs(gfx_nvidia); print_supported_pcidevs(gfx_nvidia);
#endif #endif

4
print_wiki.c
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@ -592,6 +592,10 @@ void print_supported_wiki(void)
#if NIC3COM_SUPPORT == 1 #if NIC3COM_SUPPORT == 1
print_supported_pcidevs_wiki(nics_3com); print_supported_pcidevs_wiki(nics_3com);
#endif #endif
#if NICREALTEK_SUPPORT == 1
print_supported_pcidevs_wiki(nics_realtek);
print_supported_pcidevs_wiki(nics_realteksmc1211);
#endif
#if GFXNVIDIA_SUPPORT == 1 #if GFXNVIDIA_SUPPORT == 1
print_supported_pcidevs_wiki(gfx_nvidia); print_supported_pcidevs_wiki(gfx_nvidia);
#endif #endif