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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

flashchips: Add WP settings for Flash Chip W25Q512NW

This patch adds WP register bits and decode range for Flash
Chip `W25Q512NW`.

TEST=Able to flash AP FW, wp-enable/disable on Google/rex device
which has flash chip `W25Q512NW`.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic5148f71404466dcf7772e3eb6e1800eb8666696
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67827
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
This commit is contained in:
Subrata Banik 2022-12-14 12:30:43 +05:30 committed by Felix Singer
parent c936ce4688
commit 9394b84c00

View File

@ -18674,8 +18674,9 @@ const struct flashchip flashchips[] = {
.model_id = WINBOND_NEX_W25Q512NW_IM,
.total_size = 64 * 1024,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
.tested = TEST_OK_PREW,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_WRSR2
| FEATURE_WRSR3,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -18707,6 +18708,16 @@ const struct flashchip flashchips[] = {
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ,
.voltage = {1650, 1950},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.srl = {STATUS2, 0, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {STATUS1, 6, RW},
.cmp = {STATUS2, 6, RW},
.wps = {STATUS3, 2, RW},
},
.decode_range = DECODE_RANGE_SPI25,
},
{