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Code Issues Releases Wiki Activity

chipset_enable: Mark Braswell as tested

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Reported by Uwe Vieweg:
https://mail.coreboot.org/pipermail/flashrom/2017-August/015059.html

Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/20923
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
David Hendricks 2017-08-08 23:28:54 -07:00 committed by Nico Huber
parent 4d440a7c41
commit a1bccd88c3
1 changed files with 1 additions and 1 deletions
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chipset_enable.c
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@ -1740,7 +1740,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x1f39, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
{0x8086, 0x1f3a, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
{0x8086, 0x1f3b, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont},
{0x8086, 0x229c, NT, "Intel", "Braswell", enable_flash_silvermont},
{0x8086, 0x229c, OK, "Intel", "Braswell", enable_flash_silvermont},
{0x8086, 0x2310, NT, "Intel", "DH89xxCC (Cave Creek)", enable_flash_pch7},
{0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7},
{0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0},