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flashchips: Revise all 4BA chips
Advertise all 4BA features that are currently supported by flashrom, plus add a new feature flag for the 4BA fast-read instruction. Also, list all supported 3BA and 4BA erase-block functions. As this adds a lot of new code paths that could be taken for these chips, mark them all as untested again. Change-Id: I0598496ee7058e3b170684d366f58e4014e0e871 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22423 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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fe34d2af28
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11
flash.h
11
flash.h
@ -98,9 +98,9 @@ enum write_granularity {
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/*
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* How many different erase functions do we have per chip?
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* Atmel AT25FS010 has 6 different functions.
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* Macronix MX25L25635F has 8 different functions.
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*/
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#define NUM_ERASEFUNCTIONS 6
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#define NUM_ERASEFUNCTIONS 8
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/* Feature bits used for non-SPI only */
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#define FEATURE_REGISTERMAP (1 << 0)
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@ -124,7 +124,12 @@ enum write_granularity {
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#define FEATURE_4BA_EXT_ADDR (1 << 12) /**< Regular 3-byte operations can be used by writing the most
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significant address byte into an extended address register. */
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#define FEATURE_4BA_READ (1 << 13) /**< Native 4BA read instruction (0x13) is supported. */
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#define FEATURE_4BA_WRITE (1 << 14) /**< Native 4BA byte program (0x12) is supported. */
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#define FEATURE_4BA_FAST_READ (1 << 14) /**< Native 4BA fast read instruction (0x0c) is supported. */
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#define FEATURE_4BA_WRITE (1 << 15) /**< Native 4BA byte program (0x12) is supported. */
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/* 4BA Shorthands */
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#define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE)
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#define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
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#define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
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enum test_state {
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OK = 0,
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55
flashchips.c
55
flashchips.c
@ -8127,25 +8127,34 @@ const struct flashchip flashchips[] = {
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{
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.vendor = "Macronix",
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.name = "MX25L25635F/MX25L25645E/MX25L25665E",
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.name = "MX25L25635F",
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.bustype = BUS_SPI,
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.manufacture_id = MACRONIX_ID,
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.model_id = MACRONIX_MX25L25635F,
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.total_size = 32768,
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.page_size = 256,
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/* OTP: 512B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER,
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.tested = TEST_OK_PREW,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 8192} },
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.block_erase = spi_block_erase_21,
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}, {
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.eraseblocks = { {4 * 1024, 8192} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {32 * 1024, 1024} },
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.block_erase = spi_block_erase_5c,
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}, {
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.eraseblocks = { {32 * 1024, 1024} },
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.block_erase = spi_block_erase_52,
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}, {
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.eraseblocks = { {64 * 1024, 512} },
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.block_erase = spi_block_erase_dc,
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}, {
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.eraseblocks = { {64 * 1024, 512} },
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.block_erase = spi_block_erase_d8,
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@ -8174,18 +8183,27 @@ const struct flashchip flashchips[] = {
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.total_size = 65536,
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.page_size = 256,
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/* OTP: 512B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER,
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.tested = TEST_OK_PREW,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 16384} },
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.block_erase = spi_block_erase_21,
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}, {
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.eraseblocks = { {4 * 1024, 16384} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {32 * 1024, 2048} },
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.block_erase = spi_block_erase_5c,
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}, {
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.eraseblocks = { {32 * 1024, 2048} },
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.block_erase = spi_block_erase_52,
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}, {
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.eraseblocks = { {64 * 1024, 1024} },
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.block_erase = spi_block_erase_dc,
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}, {
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.eraseblocks = { {64 * 1024, 1024} },
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.block_erase = spi_block_erase_d8,
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@ -9914,18 +9932,23 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP
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| FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE,
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.tested = TEST_OK_PREW,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 8192} },
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.block_erase = spi_block_erase_21,
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}, {
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.eraseblocks = { {4 * 1024, 8192} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 512} },
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.block_erase = spi_block_erase_dc,
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}, {
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.eraseblocks = { {64 * 1024, 512} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {32768 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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@ -9948,18 +9971,23 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP
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| FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE,
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.tested = TEST_OK_PREW,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 16384} },
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.block_erase = spi_block_erase_21,
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}, {
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.eraseblocks = { {4 * 1024, 16384} },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 1024} },
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.block_erase = spi_block_erase_dc,
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}, {
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.eraseblocks = { {64 * 1024, 1024} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {65536 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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@ -14827,8 +14855,9 @@ const struct flashchip flashchips[] = {
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/* supports SFDP */
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/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
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/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ,
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.tested = TEST_OK_PREW,
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN
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| FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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