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Function to enable the flash interface on w83697 family SuperIO chips

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Not hooked up to the superio detection framework yet.

Corresponding to flashrom svn r1529.

Signed-off-by: David Borg <borg.db@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
David Borg 2012-05-05 20:43:42 +00:00 committed by Carl-Daniel Hailfinger
parent 96c2dfc10f
commit b02c62be27
1 changed files with 33 additions and 0 deletions
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33
board_enable.c
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@ -380,6 +380,39 @@ static void w836xx_memw_enable(uint16_t port)
w836xx_ext_leave(port);
}
/**
* Enable MEMW# and set ROM size to max.
* Supported chips:
* W83697HF/F/HG, W83697SF/UF/UG
*/
void w83697xx_memw_enable(uint16_t port)
{
w836xx_ext_enter(port);
if (!(sio_read(port, 0x24) & 0x02)) { /* Flash ROM enabled? */
if((sio_read(port, 0x2A) & 0xF0) == 0xF0) {
/* CR24 Bits 7 & 2 must be set to 0 enable the flash ROM */
/* address segments 000E0000h ~ 000FFFFFh on W83697SF/UF/UG */
/* These bits are reserved on W83697HF/F/HG */
/* Shouldn't be needed though. */
/* CR28 Bit3 must be set to 1 to enable flash access to */
/* FFE80000h ~ FFEFFFFFh on W83697SF/UF/UG. */
/* This bit is reserved on W83697HF/F/HG which default to 0 */
sio_mask(port, 0x28, 0x08, 0x08);
/* Enable MEMW# and set ROM size select to max. (4M)*/
sio_mask(port, 0x24, 0x28, 0x38);
} else {
msg_perr("WARNING: Flash interface in use by GPIO!\n");
}
} else {
msg_pinfo("BIOS ROM is disabled\n");
}
w836xx_ext_leave(port);
}
/*
* Suited for:
* - EPoX EP-8K5A2: VIA KT333 + VT8235