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tree: indent struct *_master consistently with tabs
Use `<tab>.key<tab>*= <value>,` TEST: `make VERSION=0 MAN_DATE=0` returns the same flashrom binary before and after the patch Change-Id: I1c45ea9804ca09e040d7ac98255042f58b01f8ef Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65363 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
This commit is contained in:
parent
d41595e207
commit
b554cdc91e
18
atahpt.c
18
atahpt.c
@ -65,15 +65,15 @@ static int atahpt_shutdown(void *par_data)
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}
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static const struct par_master par_master_atahpt = {
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.chip_readb = atahpt_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = atahpt_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.shutdown = atahpt_shutdown,
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.chip_readb = atahpt_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = atahpt_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.shutdown = atahpt_shutdown,
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};
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static int atahpt_init(void)
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16
atapromise.c
16
atapromise.c
@ -108,14 +108,14 @@ static uint8_t atapromise_chip_readb(const struct flashctx *flash, const chipadd
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}
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static const struct par_master par_master_atapromise = {
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.chip_readb = atapromise_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = atapromise_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.chip_readb = atapromise_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = atapromise_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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};
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static int atapromise_init(void)
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16
atavia.c
16
atavia.c
@ -133,14 +133,14 @@ static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr ad
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}
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static const struct par_master lpc_master_atavia = {
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.chip_readb = atavia_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = atavia_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.chip_readb = atavia_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = atavia_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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};
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static int atavia_init(void)
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@ -124,11 +124,11 @@ static void cp210x_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data)
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}
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static const struct bitbang_spi_master bitbang_spi_master_cp210x = {
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.set_cs = cp210x_bitbang_set_cs,
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.set_sck = cp210x_bitbang_set_sck,
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.set_mosi = cp210x_bitbang_set_mosi,
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.get_miso = cp210x_bitbang_get_miso,
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.set_sck_set_mosi = cp210x_bitbang_set_sck_set_mosi,
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.set_cs = cp210x_bitbang_set_cs,
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.set_sck = cp210x_bitbang_set_sck,
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.set_mosi = cp210x_bitbang_set_mosi,
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.get_miso = cp210x_bitbang_get_miso,
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.set_sck_set_mosi = cp210x_bitbang_set_sck_set_mosi,
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};
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static int developerbox_spi_shutdown(void *spi_data)
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16
drkaiser.c
16
drkaiser.c
@ -51,14 +51,14 @@ static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
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}
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static const struct par_master par_master_drkaiser = {
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.chip_readb = drkaiser_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = drkaiser_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.chip_readb = drkaiser_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = drkaiser_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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};
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static int drkaiser_init(void)
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@ -919,21 +919,21 @@ static const struct spi_master spi_master_dummyflasher = {
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};
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static const struct par_master par_master_dummyflasher = {
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.chip_readb = dummy_chip_readb,
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.chip_readw = dummy_chip_readw,
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.chip_readl = dummy_chip_readl,
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.chip_readn = dummy_chip_readn,
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.chip_writeb = dummy_chip_writeb,
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.chip_writew = dummy_chip_writew,
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.chip_writel = dummy_chip_writel,
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.chip_writen = dummy_chip_writen,
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.chip_readb = dummy_chip_readb,
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.chip_readw = dummy_chip_readw,
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.chip_readl = dummy_chip_readl,
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.chip_readn = dummy_chip_readn,
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.chip_writeb = dummy_chip_writeb,
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.chip_writew = dummy_chip_writew,
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.chip_writel = dummy_chip_writel,
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.chip_writen = dummy_chip_writen,
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};
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static const struct opaque_master opaque_master_dummyflasher = {
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.probe = probe_variable_size,
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.read = dummy_opaque_read,
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.write = dummy_opaque_write,
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.erase = dummy_opaque_erase,
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.probe = probe_variable_size,
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.read = dummy_opaque_read,
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.write = dummy_opaque_write,
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.erase = dummy_opaque_erase,
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};
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static int init_data(struct emu_data *data, enum chipbustype *dummy_buses_supported)
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58
ichspi.c
58
ichspi.c
@ -1785,34 +1785,34 @@ static void ich9_set_pr(const size_t reg_pr0, int i, int read_prot, int write_pr
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}
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static const struct spi_master spi_master_ich7 = {
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.max_data_read = 64,
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.max_data_write = 64,
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.command = ich_spi_send_command,
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.multicommand = ich_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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.max_data_read = 64,
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.max_data_write = 64,
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.command = ich_spi_send_command,
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.multicommand = ich_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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};
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static const struct spi_master spi_master_ich9 = {
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.max_data_read = 64,
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.max_data_write = 64,
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.command = ich_spi_send_command,
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.multicommand = ich_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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.max_data_read = 64,
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.max_data_write = 64,
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.command = ich_spi_send_command,
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.multicommand = ich_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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};
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static const struct opaque_master opaque_master_ich_hwseq = {
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.max_data_read = 64,
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.max_data_write = 64,
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.probe = ich_hwseq_probe,
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.read = ich_hwseq_read,
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.write = ich_hwseq_write,
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.erase = ich_hwseq_block_erase,
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.read_register = ich_hwseq_read_status,
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.write_register = ich_hwseq_write_status,
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.max_data_read = 64,
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.max_data_write = 64,
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.probe = ich_hwseq_probe,
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.read = ich_hwseq_read,
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.write = ich_hwseq_write,
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.erase = ich_hwseq_block_erase,
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.read_register = ich_hwseq_read_status,
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.write_register = ich_hwseq_write_status,
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};
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static int init_ich7_spi(void *spibar, enum ich_chipset ich_gen)
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@ -2208,13 +2208,13 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
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}
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static const struct spi_master spi_master_via = {
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.max_data_read = 16,
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.max_data_write = 16,
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.command = ich_spi_send_command,
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.multicommand = ich_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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.max_data_read = 16,
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.max_data_write = 16,
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.command = ich_spi_send_command,
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.multicommand = ich_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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};
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int via_init_spi(uint32_t mmio_base)
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16
internal.c
16
internal.c
@ -106,14 +106,14 @@ static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
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}
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static const struct par_master par_master_internal = {
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.chip_readb = internal_chip_readb,
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.chip_readw = internal_chip_readw,
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.chip_readl = internal_chip_readl,
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.chip_readn = internal_chip_readn,
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.chip_writeb = internal_chip_writeb,
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.chip_writew = internal_chip_writew,
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.chip_writel = internal_chip_writel,
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.chip_writen = fallback_chip_writen,
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.chip_readb = internal_chip_readb,
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.chip_readw = internal_chip_readw,
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.chip_readl = internal_chip_readl,
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.chip_readn = internal_chip_readn,
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.chip_writeb = internal_chip_writeb,
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.chip_writew = internal_chip_writew,
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.chip_writel = internal_chip_writel,
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.chip_writen = fallback_chip_writen,
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};
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static int get_params(int *boardenable, int *boardmismatch,
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16
it8212.c
16
it8212.c
@ -44,14 +44,14 @@ static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr ad
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}
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static const struct par_master par_master_it8212 = {
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.chip_readb = it8212_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = it8212_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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.chip_readb = it8212_chip_readb,
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.chip_readw = fallback_chip_readw,
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.chip_readl = fallback_chip_readl,
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.chip_readn = fallback_chip_readn,
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.chip_writeb = it8212_chip_writeb,
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.chip_writew = fallback_chip_writew,
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.chip_writel = fallback_chip_writel,
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.chip_writen = fallback_chip_writen,
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};
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static int it8212_init(void)
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14
it85spi.c
14
it85spi.c
@ -282,13 +282,13 @@ static int it85xx_spi_send_command(const struct flashctx *flash,
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}
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static const struct spi_master spi_master_it85xx = {
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.max_data_read = 64,
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.max_data_write = 64,
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.command = it85xx_spi_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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.max_data_read = 64,
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.max_data_write = 64,
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.command = it85xx_spi_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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.shutdown = it85xx_shutdown,
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};
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@ -437,9 +437,9 @@ static const struct opaque_master linux_mtd_opaque_master = {
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.write = linux_mtd_write,
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.erase = linux_mtd_erase,
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.shutdown = linux_mtd_shutdown,
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.wp_read_cfg = linux_mtd_wp_read_cfg,
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.wp_write_cfg = linux_mtd_wp_write_cfg,
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.wp_get_ranges = linux_mtd_wp_get_available_ranges,
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.wp_read_cfg = linux_mtd_wp_read_cfg,
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.wp_write_cfg = linux_mtd_wp_write_cfg,
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.wp_get_ranges = linux_mtd_wp_get_available_ranges,
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};
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/* Returns 0 if setup is successful, non-zero to indicate error */
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@ -429,14 +429,14 @@ static int lspcon_i2c_spi_shutdown(void *data)
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}
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static const struct spi_master spi_master_i2c_lspcon = {
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.max_data_read = 16,
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.max_data_write = 12,
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.command = lspcon_i2c_spi_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = lspcon_i2c_spi_read,
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.write_256 = lspcon_i2c_spi_write_256,
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.write_aai = lspcon_i2c_spi_write_aai,
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.shutdown = lspcon_i2c_spi_shutdown,
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.max_data_read = 16,
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.max_data_write = 12,
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.command = lspcon_i2c_spi_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = lspcon_i2c_spi_read,
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.write_256 = lspcon_i2c_spi_write_256,
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.write_aai = lspcon_i2c_spi_write_aai,
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.shutdown = lspcon_i2c_spi_shutdown,
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};
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static int lspcon_i2c_spi_init(void)
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14
mcp6x_spi.c
14
mcp6x_spi.c
@ -100,13 +100,13 @@ static int mcp6x_bitbang_get_miso(void *spi_data)
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}
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static const struct bitbang_spi_master bitbang_spi_master_mcp6x = {
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.set_cs = mcp6x_bitbang_set_cs,
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.set_sck = mcp6x_bitbang_set_sck,
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.set_mosi = mcp6x_bitbang_set_mosi,
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.get_miso = mcp6x_bitbang_get_miso,
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.request_bus = mcp6x_request_spibus,
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.release_bus = mcp6x_release_spibus,
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.half_period = 0,
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.set_cs = mcp6x_bitbang_set_cs,
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.set_sck = mcp6x_bitbang_set_sck,
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.set_mosi = mcp6x_bitbang_set_mosi,
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.get_miso = mcp6x_bitbang_get_miso,
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.request_bus = mcp6x_request_spibus,
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.release_bus = mcp6x_release_spibus,
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.half_period = 0,
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};
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static int mcp6x_shutdown(void *spi_data)
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@ -440,14 +440,14 @@ static int mediatek_send_command(const struct flashctx *flash,
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}
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static const struct spi_master spi_master_i2c_mediatek = {
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.max_data_read = I2C_SMBUS_BLOCK_MAX,
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.max_data_read = I2C_SMBUS_BLOCK_MAX,
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// Leave room for 1-byte command and up to a 4-byte address.
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.max_data_write = I2C_SMBUS_BLOCK_MAX - 5,
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.command = mediatek_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = default_spi_read,
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.write_256 = default_spi_write_256,
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.write_aai = default_spi_write_aai,
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.max_data_write = I2C_SMBUS_BLOCK_MAX - 5,
|
||||
.command = mediatek_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
};
|
||||
|
||||
static int mediatek_shutdown(void *data)
|
||||
|
@ -138,14 +138,14 @@ static int mstarddc_spi_send_command(const struct flashctx *flash,
|
||||
}
|
||||
|
||||
static const struct spi_master spi_master_mstarddc = {
|
||||
.max_data_read = 256,
|
||||
.max_data_write = 256,
|
||||
.command = mstarddc_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = mstarddc_spi_shutdown,
|
||||
.max_data_read = 256,
|
||||
.max_data_write = 256,
|
||||
.command = mstarddc_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = mstarddc_spi_shutdown,
|
||||
};
|
||||
|
||||
/* Returns 0 upon success, a negative number upon errors. */
|
||||
|
16
ni845x_spi.c
16
ni845x_spi.c
@ -529,14 +529,14 @@ static int ni845x_spi_transmit(const struct flashctx *flash,
|
||||
}
|
||||
|
||||
static const struct spi_master spi_programmer_ni845x = {
|
||||
.max_data_read = MAX_DATA_READ_UNLIMITED,
|
||||
.max_data_write = MAX_DATA_WRITE_UNLIMITED,
|
||||
.command = ni845x_spi_transmit,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = ni845x_spi_shutdown,
|
||||
.max_data_read = MAX_DATA_READ_UNLIMITED,
|
||||
.max_data_write = MAX_DATA_WRITE_UNLIMITED,
|
||||
.command = ni845x_spi_transmit,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = ni845x_spi_shutdown,
|
||||
};
|
||||
|
||||
static int ni845x_spi_init(void)
|
||||
|
18
nic3com.c
18
nic3com.c
@ -90,15 +90,15 @@ static int nic3com_shutdown(void *par_data)
|
||||
}
|
||||
|
||||
static const struct par_master par_master_nic3com = {
|
||||
.chip_readb = nic3com_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nic3com_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.shutdown = nic3com_shutdown,
|
||||
.chip_readb = nic3com_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nic3com_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.shutdown = nic3com_shutdown,
|
||||
};
|
||||
|
||||
static int nic3com_init(void)
|
||||
|
16
nicintel.c
16
nicintel.c
@ -54,14 +54,14 @@ static uint8_t nicintel_chip_readb(const struct flashctx *flash,
|
||||
}
|
||||
|
||||
static const struct par_master par_master_nicintel = {
|
||||
.chip_readb = nicintel_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nicintel_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.chip_readb = nicintel_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nicintel_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
};
|
||||
|
||||
static int nicintel_init(void)
|
||||
|
@ -442,19 +442,19 @@ out:
|
||||
}
|
||||
|
||||
static const struct opaque_master opaque_master_nicintel_ee_82580 = {
|
||||
.probe = nicintel_ee_probe_82580,
|
||||
.read = nicintel_ee_read,
|
||||
.write = nicintel_ee_write_82580,
|
||||
.erase = nicintel_ee_erase_82580,
|
||||
.shutdown = nicintel_ee_shutdown_82580,
|
||||
.probe = nicintel_ee_probe_82580,
|
||||
.read = nicintel_ee_read,
|
||||
.write = nicintel_ee_write_82580,
|
||||
.erase = nicintel_ee_erase_82580,
|
||||
.shutdown = nicintel_ee_shutdown_82580,
|
||||
};
|
||||
|
||||
static const struct opaque_master opaque_master_nicintel_ee_i210 = {
|
||||
.probe = nicintel_ee_probe_i210,
|
||||
.read = nicintel_ee_read,
|
||||
.write = nicintel_ee_write_i210,
|
||||
.erase = nicintel_ee_erase_i210,
|
||||
.shutdown = nicintel_ee_shutdown_i210,
|
||||
.probe = nicintel_ee_probe_i210,
|
||||
.read = nicintel_ee_read,
|
||||
.write = nicintel_ee_write_i210,
|
||||
.erase = nicintel_ee_erase_i210,
|
||||
.shutdown = nicintel_ee_shutdown_i210,
|
||||
};
|
||||
|
||||
static int nicintel_ee_init(void)
|
||||
|
@ -200,15 +200,15 @@ static int nicintel_bitbang_set_sck_get_miso(int sck, void *spi_data)
|
||||
}
|
||||
|
||||
static const struct bitbang_spi_master bitbang_spi_master_nicintel = {
|
||||
.set_cs = nicintel_bitbang_set_cs,
|
||||
.set_sck = nicintel_bitbang_set_sck,
|
||||
.set_mosi = nicintel_bitbang_set_mosi,
|
||||
.set_sck_set_mosi = nicintel_bitbang_set_sck_set_mosi,
|
||||
.set_sck_get_miso = nicintel_bitbang_set_sck_get_miso,
|
||||
.get_miso = nicintel_bitbang_get_miso,
|
||||
.request_bus = nicintel_request_spibus,
|
||||
.release_bus = nicintel_release_spibus,
|
||||
.half_period = 1,
|
||||
.set_cs = nicintel_bitbang_set_cs,
|
||||
.set_sck = nicintel_bitbang_set_sck,
|
||||
.set_mosi = nicintel_bitbang_set_mosi,
|
||||
.set_sck_set_mosi = nicintel_bitbang_set_sck_set_mosi,
|
||||
.set_sck_get_miso = nicintel_bitbang_set_sck_get_miso,
|
||||
.get_miso = nicintel_bitbang_get_miso,
|
||||
.request_bus = nicintel_request_spibus,
|
||||
.release_bus = nicintel_release_spibus,
|
||||
.half_period = 1,
|
||||
};
|
||||
|
||||
static int nicintel_spi_shutdown(void *spi_data)
|
||||
|
16
nicnatsemi.c
16
nicnatsemi.c
@ -64,14 +64,14 @@ static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
|
||||
}
|
||||
|
||||
static const struct par_master par_master_nicnatsemi = {
|
||||
.chip_readb = nicnatsemi_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nicnatsemi_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.chip_readb = nicnatsemi_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nicnatsemi_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
};
|
||||
|
||||
static int nicnatsemi_init(void)
|
||||
|
18
nicrealtek.c
18
nicrealtek.c
@ -86,15 +86,15 @@ static int nicrealtek_shutdown(void *data)
|
||||
}
|
||||
|
||||
static const struct par_master par_master_nicrealtek = {
|
||||
.chip_readb = nicrealtek_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nicrealtek_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.shutdown = nicrealtek_shutdown,
|
||||
.chip_readb = nicrealtek_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = nicrealtek_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.shutdown = nicrealtek_shutdown,
|
||||
};
|
||||
|
||||
static int nicrealtek_init(void)
|
||||
|
14
ogp_spi.c
14
ogp_spi.c
@ -92,13 +92,13 @@ static int ogp_bitbang_get_miso(void *spi_data)
|
||||
}
|
||||
|
||||
static const struct bitbang_spi_master bitbang_spi_master_ogp = {
|
||||
.set_cs = ogp_bitbang_set_cs,
|
||||
.set_sck = ogp_bitbang_set_sck,
|
||||
.set_mosi = ogp_bitbang_set_mosi,
|
||||
.get_miso = ogp_bitbang_get_miso,
|
||||
.request_bus = ogp_request_spibus,
|
||||
.release_bus = ogp_release_spibus,
|
||||
.half_period = 0,
|
||||
.set_cs = ogp_bitbang_set_cs,
|
||||
.set_sck = ogp_bitbang_set_sck,
|
||||
.set_mosi = ogp_bitbang_set_mosi,
|
||||
.get_miso = ogp_bitbang_get_miso,
|
||||
.request_bus = ogp_request_spibus,
|
||||
.release_bus = ogp_release_spibus,
|
||||
.half_period = 0,
|
||||
};
|
||||
|
||||
static int ogp_spi_shutdown(void *data)
|
||||
|
10
pony_spi.c
10
pony_spi.c
@ -100,11 +100,11 @@ static int pony_bitbang_get_miso(void *spi_data)
|
||||
}
|
||||
|
||||
static const struct bitbang_spi_master bitbang_spi_master_pony = {
|
||||
.set_cs = pony_bitbang_set_cs,
|
||||
.set_sck = pony_bitbang_set_sck,
|
||||
.set_mosi = pony_bitbang_set_mosi,
|
||||
.get_miso = pony_bitbang_get_miso,
|
||||
.half_period = 0,
|
||||
.set_cs = pony_bitbang_set_cs,
|
||||
.set_sck = pony_bitbang_set_sck,
|
||||
.set_mosi = pony_bitbang_set_mosi,
|
||||
.get_miso = pony_bitbang_get_miso,
|
||||
.half_period = 0,
|
||||
};
|
||||
|
||||
static int pony_spi_shutdown(void *data)
|
||||
|
@ -1311,14 +1311,14 @@ static int raiden_debug_spi_shutdown(void * data)
|
||||
}
|
||||
|
||||
static const struct spi_master spi_master_raiden_debug = {
|
||||
.features = SPI_MASTER_4BA,
|
||||
.max_data_read = 0,
|
||||
.max_data_write = 0,
|
||||
.command = NULL,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.features = SPI_MASTER_4BA,
|
||||
.max_data_read = 0,
|
||||
.max_data_write = 0,
|
||||
.command = NULL,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = raiden_debug_spi_shutdown,
|
||||
};
|
||||
|
||||
|
10
rayer_spi.c
10
rayer_spi.c
@ -228,11 +228,11 @@ static int rayer_shutdown(void *spi_data)
|
||||
}
|
||||
|
||||
static const struct bitbang_spi_master bitbang_spi_master_rayer = {
|
||||
.set_cs = rayer_bitbang_set_cs,
|
||||
.set_sck = rayer_bitbang_set_sck,
|
||||
.set_mosi = rayer_bitbang_set_mosi,
|
||||
.get_miso = rayer_bitbang_get_miso,
|
||||
.half_period = 0,
|
||||
.set_cs = rayer_bitbang_set_cs,
|
||||
.set_sck = rayer_bitbang_set_sck,
|
||||
.set_mosi = rayer_bitbang_set_mosi,
|
||||
.get_miso = rayer_bitbang_get_miso,
|
||||
.half_period = 0,
|
||||
};
|
||||
|
||||
static int rayer_spi_init(void)
|
||||
|
@ -434,14 +434,14 @@ static int realtek_mst_i2c_spi_shutdown(void *data)
|
||||
}
|
||||
|
||||
static const struct spi_master spi_master_i2c_realtek_mst = {
|
||||
.max_data_read = 16,
|
||||
.max_data_write = 8,
|
||||
.command = realtek_mst_i2c_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = realtek_mst_i2c_spi_read,
|
||||
.write_256 = realtek_mst_i2c_spi_write_256,
|
||||
.write_aai = realtek_mst_i2c_spi_write_aai,
|
||||
.shutdown = realtek_mst_i2c_spi_shutdown,
|
||||
.max_data_read = 16,
|
||||
.max_data_write = 8,
|
||||
.command = realtek_mst_i2c_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = realtek_mst_i2c_spi_read,
|
||||
.write_256 = realtek_mst_i2c_spi_write_256,
|
||||
.write_aai = realtek_mst_i2c_spi_write_aai,
|
||||
.shutdown = realtek_mst_i2c_spi_shutdown,
|
||||
};
|
||||
|
||||
static int get_params(int *reset, int *enter_isp)
|
||||
|
16
satamv.c
16
satamv.c
@ -75,14 +75,14 @@ static uint8_t satamv_chip_readb(const struct flashctx *flash,
|
||||
}
|
||||
|
||||
static const struct par_master par_master_satamv = {
|
||||
.chip_readb = satamv_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = satamv_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.chip_readb = satamv_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = satamv_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
};
|
||||
|
||||
/*
|
||||
|
16
satasii.c
16
satasii.c
@ -84,14 +84,14 @@ static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr a
|
||||
}
|
||||
|
||||
static const struct par_master par_master_satasii = {
|
||||
.chip_readb = satasii_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = satasii_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.chip_readb = satasii_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = fallback_chip_readn,
|
||||
.chip_writeb = satasii_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
};
|
||||
|
||||
static int satasii_init(void)
|
||||
|
48
sb600spi.c
48
sb600spi.c
@ -595,36 +595,36 @@ static int sb600spi_shutdown(void *data)
|
||||
}
|
||||
|
||||
static const struct spi_master spi_master_sb600 = {
|
||||
.max_data_read = FIFO_SIZE_OLD,
|
||||
.max_data_write = FIFO_SIZE_OLD - 3,
|
||||
.command = sb600_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = sb600spi_shutdown,
|
||||
.max_data_read = FIFO_SIZE_OLD,
|
||||
.max_data_write = FIFO_SIZE_OLD - 3,
|
||||
.command = sb600_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = sb600spi_shutdown,
|
||||
};
|
||||
|
||||
static const struct spi_master spi_master_yangtze = {
|
||||
.max_data_read = FIFO_SIZE_YANGTZE - 3, /* Apparently the big SPI 100 buffer is not a ring buffer. */
|
||||
.max_data_write = FIFO_SIZE_YANGTZE - 3,
|
||||
.command = spi100_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = sb600spi_shutdown,
|
||||
.max_data_read = FIFO_SIZE_YANGTZE - 3, /* Apparently the big SPI 100 buffer is not a ring buffer. */
|
||||
.max_data_write = FIFO_SIZE_YANGTZE - 3,
|
||||
.command = spi100_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = sb600spi_shutdown,
|
||||
};
|
||||
|
||||
static const struct spi_master spi_master_promontory = {
|
||||
.max_data_read = MAX_DATA_READ_UNLIMITED,
|
||||
.max_data_write = FIFO_SIZE_YANGTZE - 3,
|
||||
.command = spi100_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = promontory_read_memmapped,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = sb600spi_shutdown,
|
||||
.max_data_read = MAX_DATA_READ_UNLIMITED,
|
||||
.max_data_write = FIFO_SIZE_YANGTZE - 3,
|
||||
.command = spi100_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = promontory_read_memmapped,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = sb600spi_shutdown,
|
||||
};
|
||||
|
||||
int sb600_probe_spi(struct pci_dev *dev)
|
||||
|
16
serprog.c
16
serprog.c
@ -551,14 +551,14 @@ static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf,
|
||||
}
|
||||
|
||||
static const struct par_master par_master_serprog = {
|
||||
.chip_readb = serprog_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = serprog_chip_readn,
|
||||
.chip_writeb = serprog_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
.chip_readb = serprog_chip_readb,
|
||||
.chip_readw = fallback_chip_readw,
|
||||
.chip_readl = fallback_chip_readl,
|
||||
.chip_readn = serprog_chip_readn,
|
||||
.chip_writeb = serprog_chip_writeb,
|
||||
.chip_writew = fallback_chip_writew,
|
||||
.chip_writel = fallback_chip_writel,
|
||||
.chip_writen = fallback_chip_writen,
|
||||
};
|
||||
|
||||
static enum chipbustype serprog_buses_supported = BUS_NONE;
|
||||
|
@ -460,14 +460,14 @@ static int stlinkv3_spi_shutdown(void *data)
|
||||
}
|
||||
|
||||
static const struct spi_master spi_programmer_stlinkv3 = {
|
||||
.max_data_read = UINT16_MAX,
|
||||
.max_data_write = UINT16_MAX,
|
||||
.command = stlinkv3_spi_transmit,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = stlinkv3_spi_shutdown,
|
||||
.max_data_read = UINT16_MAX,
|
||||
.max_data_write = UINT16_MAX,
|
||||
.command = stlinkv3_spi_transmit,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = default_spi_read,
|
||||
.write_256 = default_spi_write_256,
|
||||
.write_aai = default_spi_write_aai,
|
||||
.shutdown = stlinkv3_spi_shutdown,
|
||||
};
|
||||
|
||||
static int stlinkv3_spi_init(void)
|
||||
|
16
wbsio_spi.c
16
wbsio_spi.c
@ -183,14 +183,14 @@ static int wbsio_spi_shutdown(void *data)
|
||||
}
|
||||
|
||||
static const struct spi_master spi_master_wbsio = {
|
||||
.max_data_read = MAX_DATA_UNSPECIFIED,
|
||||
.max_data_write = MAX_DATA_UNSPECIFIED,
|
||||
.command = wbsio_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = wbsio_spi_read,
|
||||
.write_256 = spi_chip_write_1,
|
||||
.write_aai = spi_chip_write_1,
|
||||
.shutdown = wbsio_spi_shutdown,
|
||||
.max_data_read = MAX_DATA_UNSPECIFIED,
|
||||
.max_data_write = MAX_DATA_UNSPECIFIED,
|
||||
.command = wbsio_spi_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = wbsio_spi_read,
|
||||
.write_256 = spi_chip_write_1,
|
||||
.write_aai = spi_chip_write_1,
|
||||
.shutdown = wbsio_spi_shutdown,
|
||||
};
|
||||
|
||||
int wbsio_check_for_spi(void)
|
||||
|
Loading…
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Reference in New Issue
Block a user