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chipset_enable: Mark SiS 630 as tested OK

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Tested on an Elitegroup P6STMT with an SST39SF020A parallel flash [1].

[1] https://mail.coreboot.org/pipermail/flashrom/2017-November/015193.html

Change-Id: If8cc2af262e392bfba326a62c1a48c658c7d6ce8
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Nico Huber 2017-11-19 16:29:45 +01:00
parent 1f33cb5800
commit bbf0dbde38
1 changed files with 1 additions and 1 deletions
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chipset_enable.c
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@ -1614,7 +1614,7 @@ const struct penable chipset_enables[] = {
{0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530},
{0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540},
{0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530},
{0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540},
{0x1039, 0x0630, OK, "SiS", "630", enable_flash_sis540},
{0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540},
{0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540},
{0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540},