openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 07:02:34 +02:00
Code Issues Releases Wiki Activity

internal.c: Co-locate global variables to top of file

Browse Source 
This just makes internal.c at bit easier to parse and helps
the read get a view of all the singleton state in one go.

BUG=none
BRANCH=none
TEST=builds

Change-Id: Id4109dfb17f63d80fb3fb3f2a1d0ab54d9eddc6e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46814
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Edward O'Callaghan 2020-10-26 19:07:25 +11:00 committed by Edward O'Callaghan
parent d7b48758a5
commit c15de25a7c
1 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
internal.c
View File

@ -21,6 +21,14 @@
#include "programmer.h"
#include "hwaccess.h"
int is_laptop = 0;
int laptop_ok = 0;
int force_boardenable = 0;
int force_boardmismatch = 0;
enum chipbustype internal_buses_supported = BUS_NONE;
struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass)
{
struct pci_dev *temp;
@ -79,9 +87,6 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
return NULL;
}
int force_boardenable = 0;
int force_boardmismatch = 0;
#if IS_X86
void probe_superio(void)
{
@ -110,9 +115,6 @@ int register_superio(struct superio s)
#endif
int is_laptop = 0;
int laptop_ok = 0;
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
{
@ -167,8 +169,6 @@ static const struct par_master par_master_internal = {
.chip_writen = fallback_chip_writen,
};
enum chipbustype internal_buses_supported = BUS_NONE;
int internal_init(void)
{
int ret = 0;