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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

flashchips: Add support for MXIC MX25L3239E

The MX25L3239E has been tested by ch341a programmer : read, write,
erase and wp.

We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.

MX25L3239E datasheet is available at the following URL:
https://www.mxic.com.tw/Lists/Datasheet/Attachments/8613/MX25L3239E,%203V,%2032Mb,%20v1.3.pdf

Change-Id: Ic7a848028fe937deb1bf83ef2a9dddf1330334b6
Signed-off-by: DanielZhang <danielzhang@mxic.com.cn>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/81563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
DanielZhang 2024-03-30 10:44:48 +08:00 committed by Anastasia Klimchuk
parent 183208b5cb
commit c2bb2eff4c
2 changed files with 49 additions and 0 deletions

View File

@ -9612,6 +9612,54 @@ const struct flashchip flashchips[] = {
.decode_range = DECODE_RANGE_SPI25_BIT_CMP,
},
{
.vendor = "Macronix",
.name = "MX25L3239E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L3239E,
.total_size = 4096,
.page_size = 256,
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR | FEATURE_SCUR ,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 1024} },
.block_erase = SPI_BLOCK_ERASE_20,
}, {
.eraseblocks = { {32 * 1024, 128} },
.block_erase = SPI_BLOCK_ERASE_52,
}, {
.eraseblocks = { {64 * 1024, 64} },
.block_erase = SPI_BLOCK_ERASE_D8,
}, {
.eraseblocks = { {4 * 1024 * 1024, 1} },
.block_erase = SPI_BLOCK_ERASE_60,
}, {
.eraseblocks = { {4 * 1024 * 1024, 1} },
.block_erase = SPI_BLOCK_ERASE_C7,
}
},
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */
.unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {CONFIG, 3, OTP},
.wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */
},
.decode_range = DECODE_RANGE_SPI25,
},
{
.vendor = "Macronix",
.name = "MX25L3235D",

View File

@ -536,6 +536,7 @@
#define MACRONIX_MX25L6495F 0x9517
#define MACRONIX_MX25L3255E 0x9e16
#define MACRONIX_MX77L25650F 0x7519
#define MACRONIX_MX25L3239E 0x2536
#define MACRONIX_MX25R1635F 0x2815
#define MACRONIX_MX25R3235F 0x2816