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CHROMIUM: flashrom: update .tested field for EN25QH128

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update .tested field from TEST_UNTESTED to TEST_OK_PREW

BUG=b:159768722
BRANCH=none
TEST=Flash Duffy bios
     pass on running `flashrom_tester /usr/sbin/flashrom host`

Original-Change-Id: I9467588988c2cab0987737c53ace0832144ef169
Original-Signed-off-by: Tim Chen <tim-chen@quanta.corp-partner.google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2281508
Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Original-Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
(cherry picked from commit 045e05eb92e3dd826e8ce61973c0d1004195a3ff)

Change-Id: Ic111f1a9cc5c7b5b5100ddda362c11c91e8a4165
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
Tim Chen 2020-07-06 14:59:21 +08:00 committed by Edward O'Callaghan
parent 9635cb4d91
commit c60eceff19
1 changed files with 1 additions and 1 deletions
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2
flashchips.c
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@ -5105,7 +5105,7 @@ const struct flashchip flashchips[] = {
/* OTP: 512B total; enter 0x3A */
/* QPI enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =