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ichspi: Introduce HSFC_FDBC_VAL(n) macro

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This patch introduces HSFC_FDBC_VAL(n) macro to use in SPI read and
write operations.

BUG=b:223630977
TEST=Able to perform read/write/erase operation on PCH 600 series
chipset (board name: Brya).

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ie2512c85de9fc21286234b97f5842ecef1729787
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Subrata Banik 2022-04-07 19:49:15 +00:00 committed by Anastasia Klimchuk
parent e7d6caffec
commit d3bd399f67
1 changed files with 3 additions and 2 deletions
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5
ichspi.c
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@ -131,6 +131,7 @@
/* 3-7: reserved */
#define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */
#define HSFC_FDBC (0x3f << HSFC_FDBC_OFF)
#define HSFC_FDBC_VAL(n) (((n) << HSFC_FDBC_OFF) & HSFC_FDBC)
/* 14: reserved */
#define HSFC_SME_OFF 15 /* 15: SPI SMI# Enable */
#define HSFC_SME (0x1 << HSFC_SME_OFF)
@ -1473,7 +1474,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
hsfc &= ~hwseq_data.hsfc_fcycle; /* set read operation */
hsfc &= ~HSFC_FDBC; /* clear byte count */
/* set byte count */
hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC);
hsfc |= HSFC_FDBC_VAL(block_len - 1);
hsfc |= HSFC_FGO; /* start */
REGWRITE16(ICH9_REG_HSFC, hsfc);
@ -1520,7 +1521,7 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned
hsfc |= (0x2 << HSFC_FCYCLE_OFF); /* set write operation */
hsfc &= ~HSFC_FDBC; /* clear byte count */
/* set byte count */
hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC);
hsfc |= HSFC_FDBC_VAL(block_len - 1);
hsfc |= HSFC_FGO; /* start */
REGWRITE16(ICH9_REG_HSFC, hsfc);