mirror of
https://review.coreboot.org/flashrom.git
synced 2025-05-13 06:41:00 +02:00
flashrom.c: Update check_block_eraser function to use probe opcode
Update the check_block_eraser function to use probe_opcode to see if the given block_eraser is supported by the spi master. This will help to get a real count of usable block_erasers. Change-Id: I6591a84ae1fe5bc1648051cc30b9393450033852 Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com>
This commit is contained in:
parent
c8b23a0902
commit
dcdf301010
@ -122,7 +122,7 @@ static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsig
|
||||
emu_data->spi_write_256_chunksize);
|
||||
}
|
||||
|
||||
static bool dummy_spi_probe_opcode(struct flashctx *flash, uint8_t opcode)
|
||||
static bool dummy_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode)
|
||||
{
|
||||
size_t i;
|
||||
struct emu_data *emu_data = flash->mst->spi.data;
|
||||
|
10
flashrom.c
10
flashrom.c
@ -309,6 +309,16 @@ static int check_block_eraser(const struct flashctx *flash, int k, int log)
|
||||
"eraseblock layout is not defined. ");
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (flash->mst->buses_supported & BUS_SPI) {
|
||||
uint8_t opcode = spi_get_opcode_from_erasefn(eraser.block_erase);
|
||||
if (!flash->mst->spi.probe_opcode(flash, opcode)) {
|
||||
if (log)
|
||||
msg_cdbg("block erase function and layout found "
|
||||
"but SPI master doesn't support the function. ");
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
// TODO: Once erase functions are annotated with allowed buses, check that as well.
|
||||
return 0;
|
||||
}
|
||||
|
2
ichspi.c
2
ichspi.c
@ -1684,7 +1684,7 @@ static int ich_spi_send_multicommand(const struct flashctx *flash,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool ich_spi_probe_opcode(struct flashctx *flash, uint8_t opcode)
|
||||
static bool ich_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode)
|
||||
{
|
||||
return find_opcode(curopcodes, opcode) >= 0;
|
||||
}
|
||||
|
@ -313,7 +313,7 @@ struct spi_master {
|
||||
int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*shutdown)(void *data);
|
||||
bool (*probe_opcode)(struct flashctx *flash, uint8_t opcode);
|
||||
bool (*probe_opcode)(const struct flashctx *flash, uint8_t opcode);
|
||||
void *data;
|
||||
};
|
||||
|
||||
@ -323,7 +323,7 @@ int default_spi_send_multicommand(const struct flashctx *flash, struct spi_comma
|
||||
int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
bool default_spi_probe_opcode(struct flashctx *flash, uint8_t opcode);
|
||||
bool default_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode);
|
||||
int register_spi_master(const struct spi_master *mst, void *data);
|
||||
|
||||
/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
|
||||
|
2
spi.c
2
spi.c
@ -134,7 +134,7 @@ int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start
|
||||
return flash->mst->spi.write_aai(flash, buf, start, len);
|
||||
}
|
||||
|
||||
bool default_spi_probe_opcode(struct flashctx *flash, uint8_t opcode)
|
||||
bool default_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user