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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-05 07:40:40 +02:00

flashrom.c: Update check_block_eraser function to use probe opcode

Update the check_block_eraser function to use probe_opcode to see if the
given block_eraser is supported by the spi master. This will help to get
a real count of usable block_erasers.

Change-Id: I6591a84ae1fe5bc1648051cc30b9393450033852
Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com>
This commit is contained in:
Aarya Chaumal
2022-08-14 23:16:44 +05:30
committed by Simon Buhrow
parent c8b23a0902
commit dcdf301010
5 changed files with 15 additions and 5 deletions

View File

@ -313,7 +313,7 @@ struct spi_master {
int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int (*shutdown)(void *data);
bool (*probe_opcode)(struct flashctx *flash, uint8_t opcode);
bool (*probe_opcode)(const struct flashctx *flash, uint8_t opcode);
void *data;
};
@ -323,7 +323,7 @@ int default_spi_send_multicommand(const struct flashctx *flash, struct spi_comma
int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
bool default_spi_probe_opcode(struct flashctx *flash, uint8_t opcode);
bool default_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode);
int register_spi_master(const struct spi_master *mst, void *data);
/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */