1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

jedec.c: Move probe_timings decode into sep func

The chip data structure packed from the flashchips db
should have the probe_timing field decoded by its own
function.

Change-Id: I638518cd537954172eb774f6d15af0db7e06d1ba
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/72609
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Edward O'Callaghan 2023-01-30 23:01:35 +11:00 committed by Edward O'Callaghan
parent f4ddd32343
commit dddf948685

30
jedec.c
View File

@ -167,6 +167,24 @@ int probe_jedec_29gl(struct flashctx *flash)
return 1;
}
static int probe_timings(const struct flashchip *chip, unsigned int *tenter, unsigned int *texit)
{
if (chip->probe_timing > 0) {
*tenter = *texit = chip->probe_timing;
} else if (chip->probe_timing == TIMING_ZERO) { /* No delay. */
*tenter = *texit = 0;
} else if (chip->probe_timing == TIMING_FIXME) { /* == _IGNORED */
msg_cdbg("Chip lacks correct probe timing information, using default 10ms/40us. ");
*tenter = 10000;
*texit = 40;
} else {
msg_cerr("Chip has negative value in probe_timing, failing without chip access\n");
return -1;
}
return 0;
}
int probe_jedec(struct flashctx *flash)
{
const chipaddr bios = flash->virtual_memory;
@ -178,18 +196,8 @@ int probe_jedec(struct flashctx *flash)
uint32_t flashcontent1, flashcontent2;
unsigned int probe_timing_enter, probe_timing_exit;
if (chip->probe_timing > 0)
probe_timing_enter = probe_timing_exit = chip->probe_timing;
else if (chip->probe_timing == TIMING_ZERO) { /* No delay. */
probe_timing_enter = probe_timing_exit = 0;
} else if (chip->probe_timing == TIMING_FIXME) { /* == _IGNORED */
msg_cdbg("Chip lacks correct probe timing information, using default 10ms/40us. ");
probe_timing_enter = 10000;
probe_timing_exit = 40;
} else {
msg_cerr("Chip has negative value in probe_timing, failing without chip access\n");
if (probe_timings(chip, &probe_timing_enter, &probe_timing_exit) < 0)
return 0;
}
/* Earlier probes might have been too fast for the chip to enter ID
* mode completely. Allow the chip to finish this before seeing a