mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00
Rename lspcon_i2c_spi to parade_lspcon
The chip targeted by the `lspcon_i2c_spi` programmer is a Parade PS175. Rename the programmer to match the chips vendor / family instead of the generic LSPCON protocol. Remove the `_i2c_spi` ending in preparation to become an opaque master. The chip is visible on an Acer Chromebox CXI4. https://www.paradetech.com/products/ps175/ https://www.acer.com/ac/en/US/content/series/acerchromeboxcxi4 TEST: `make CONFIG_PARADE_LSPCON=yes` and `meson build -Dconfig_parade_lspcon=true` produces flashrom binaries with the parade_lspcon programmer included. Change-Id: I9148be6d9162c1722ff739929ca5e181b628dd57 Signed-off-by: Thomas Heijligen <src@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Thomas Heijligen
Anastasia Klimchuk
parent
494bedae23
commit
df0bbf07de
12
Makefile
12
Makefile
@ -173,7 +173,7 @@ DEPENDS_ON_LIB_NI845X := \
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DEPENDS_ON_LINUX_I2C := \
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CONFIG_MSTARDDC_SPI \
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CONFIG_LSPCON_I2C_SPI \
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CONFIG_PARADE_LSPCON \
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CONFIG_REALTEK_MST_I2C_SPI \
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CONFIG_MEDIATEK_I2C_SPI \
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@ -455,8 +455,8 @@ CONFIG_PICKIT2_SPI ?= yes
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# Always enable STLink V3
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CONFIG_STLINKV3_SPI ?= yes
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# Disables LSPCON support until the i2c helper supports multiple systems.
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CONFIG_LSPCON_I2C_SPI ?= no
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# Disables Parade LSPCON support until the i2c helper supports multiple systems.
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CONFIG_PARASE_LSPCON ?= no
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# Disables MediaTek support until the i2c helper supports multiple systems.
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CONFIG_MEDIATEK_I2C_SPI ?= no
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@ -663,9 +663,9 @@ FEATURE_FLAGS += -D'CONFIG_STLINKV3_SPI=1'
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PROGRAMMER_OBJS += stlinkv3_spi.o
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endif
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ifeq ($(CONFIG_LSPCON_I2C_SPI), yes)
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FEATURE_FLAGS += -D'CONFIG_LSPCON_I2C_SPI=1'
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PROGRAMMER_OBJS += lspcon_i2c_spi.o
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ifeq ($(CONFIG_PARADE_LSPCON), yes)
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FEATURE_FLAGS += -D'CONFIG_PARADE_LSPCON=1'
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PROGRAMMER_OBJS += parade_lspcon.o
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endif
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ifeq ($(CONFIG_MEDIATEK_I2C_SPI), yes)
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@ -427,7 +427,7 @@ bitbanging adapter)
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.sp
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.BR "* realtek_mst_i2c_spi" " (for SPI flash ROMs attached to Realtek DisplayPort hubs accessible through I2C)"
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.sp
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.BR "* lspcon_i2c_spi" " (for SPI flash ROMs attached to Parade Technologies LSPCONs)"
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.BR "* parade_lspcon" " (for SPI flash ROMs attached to Parade Technologies LSPCONs (PS175))"
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.sp
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Some programmers have optional or mandatory parameters which are described
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in detail in the
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@ -1521,7 +1521,7 @@ syntax where \fBfrequency\fP is the SPI clock frequency in kHz.
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If the passed frequency is not supported by the adapter the nearest lower
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supported frequency will be used.
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.SS
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.BR "realtek_mst_i2c_spi " and " lspcon_i2c_spi " programmers
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.BR "realtek_mst_i2c_spi " and " parade_lspcon " programmers
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.IP
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These programmers tunnel SPI commands through I2C-connected devices. The I2C
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bus over which communication occurs must be specified either by device path
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@ -1532,7 +1532,7 @@ with the \fBdevpath\fP option:
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or by a bus number with the \fBbus\fP option, which implies a device path like
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/dev/i2c-N where N is the specified bus number:
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.sp
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.B " flashrom \-p lspcon_i2c_spi:bus=8"
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.B " flashrom \-p parade_lspcon:bus=8"
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.SS
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.BR "realtek_mst_i2c_spi " programmer
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@ -1565,11 +1565,12 @@ flash):
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.br
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.B " flashrom -p realtek_mst_i2c_spi:bus=0,enter-isp=0,reset-mcu=1 -w new.bin"
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.SS
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.BR "lspcon_i2c_spi " programmer
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.BR "parade_lspcon " programmer
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.IP
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This programmer supports SPI flash programming for chips attached to Parade
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Technologies DisplayPort-to-HDMI level shifter/protocol converters (LSPCONs).
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Communication to the SPI flash is tunneled through the LSPCON over I2C.
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Technologies DisplayPort-to-HDMI level shifter/protocol converters (LSPCONs),
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e.g. the PS175. Communication to the SPI flash is tunneled through the LSPCON
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over I2C.
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.SH EXAMPLES
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To back up and update your BIOS, run
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@ -1651,7 +1652,7 @@ permissions are set.
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.B ogp
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needs PCI configuration space read access and raw memory access.
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.sp
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.BR realtek_mst_i2c_spi " and " lspcon_i2c_spi
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.BR realtek_mst_i2c_spi " and " parade_lspcon
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need userspace access to the selected I2C bus.
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.sp
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On OpenBSD, you can obtain raw access permission by setting
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@ -75,7 +75,7 @@ extern const struct programmer_entry programmer_it8212;
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extern const struct programmer_entry programmer_jlink_spi;
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extern const struct programmer_entry programmer_linux_mtd;
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extern const struct programmer_entry programmer_linux_spi;
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extern const struct programmer_entry programmer_lspcon_i2c_spi;
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extern const struct programmer_entry programmer_parade_lspcon;
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extern const struct programmer_entry programmer_mediatek_i2c_spi;
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extern const struct programmer_entry programmer_mstarddc_spi;
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extern const struct programmer_entry programmer_ni845x_spi;
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@ -71,7 +71,7 @@ config_satasii = get_option('config_satasii')
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config_serprog = get_option('config_serprog')
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config_usbblaster_spi = get_option('config_usbblaster_spi')
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config_stlinkv3_spi = get_option('config_stlinkv3_spi')
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config_lspcon_i2c_spi = get_option('config_lspcon_i2c_spi')
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config_parade_lspcon = get_option('config_parade_lspcon')
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config_mediatek_i2c_spi = get_option('config_mediatek_i2c_spi')
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config_realtek_mst_i2c_spi = get_option('config_realtek_mst_i2c_spi')
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config_print_wiki= get_option('print_wiki')
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@ -359,9 +359,9 @@ if config_stlinkv3_spi
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srcs += files('stlinkv3_spi.c')
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cargs += '-DCONFIG_STLINKV3_SPI=1'
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endif
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if config_lspcon_i2c_spi
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srcs += files('lspcon_i2c_spi.c')
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cargs += '-DCONFIG_LSPCON_I2C_SPI=1'
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if config_parade_lspcon
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srcs += files('parade_lspcon.c')
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cargs += '-DCONFIG_PARADE_LSPCON=1'
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endif
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if config_mediatek_i2c_spi
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srcs += files('mediatek_i2c_spi.c')
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@ -39,7 +39,7 @@ option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA
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option('config_serprog', type : 'boolean', value : true, description : 'serprog')
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option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles')
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option('config_stlinkv3_spi', type : 'boolean', value : true, description : 'STMicroelectronics STLINK-V3')
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option('config_lspcon_i2c_spi', type : 'boolean', value : false, description : 'Parade lspcon USB-C to HDMI protocol translator')
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option('config_parade_lspcon', type : 'boolean', value : false, description : 'Parade USB-C to HDMI protocol translator')
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option('config_mediatek_i2c_spi', type : 'boolean', value : false, description : 'MediaTek LCD controller')
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option('config_realtek_mst_i2c_spi', type : 'boolean', value : true, description : 'Realtek MultiStream Transport MST')
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option('tests', type : 'feature', value : 'auto', description : 'Build unit tests')
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@ -27,7 +27,7 @@
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#define REGISTER_ADDRESS (0x94 >> 1)
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#define PAGE_ADDRESS (0x9e >> 1)
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#define LSPCON_PAGE_SIZE 256
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#define PAGE_SIZE 256
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#define MAX_SPI_WAIT_RETRIES 1000
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#define CLT2_SPI 0x82
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@ -69,7 +69,7 @@
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#define PAGE_HW_COFIG_REGISTER 0xaa
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#define PAGE_HW_WRITE_ENABLE 0x55
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struct lspcon_i2c_spi_data {
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struct parade_lspcon_data {
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int fd;
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};
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@ -80,7 +80,7 @@ typedef struct {
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uint8_t control;
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} packet_t;
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static int lspcon_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
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static int parade_lspcon_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
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{
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i2c_buffer_t data;
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if (i2c_buffer_t_fill(&data, buf, len))
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@ -89,7 +89,7 @@ static int lspcon_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t
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return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
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}
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static int lspcon_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
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static int parade_lspcon_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
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{
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i2c_buffer_t data;
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if (i2c_buffer_t_fill(&data, buf, len))
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@ -104,53 +104,53 @@ static int get_fd_from_context(const struct flashctx *flash)
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msg_perr("Unable to extract fd from flash context.\n");
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return SPI_GENERIC_ERROR;
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}
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const struct lspcon_i2c_spi_data *data =
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(const struct lspcon_i2c_spi_data *)flash->mst->spi.data;
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const struct parade_lspcon_data *data =
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(const struct parade_lspcon_data *)flash->mst->spi.data;
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return data->fd;
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}
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static int lspcon_i2c_spi_write_register(int fd, uint8_t i2c_register, uint8_t value)
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static int parade_lspcon_write_register(int fd, uint8_t i2c_register, uint8_t value)
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{
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uint8_t command[] = { i2c_register, value };
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return lspcon_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
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return parade_lspcon_write_data(fd, REGISTER_ADDRESS, command, 2);
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}
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static int lspcon_i2c_spi_read_register(int fd, uint8_t i2c_register, uint8_t *value)
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static int parade_lspcon_read_register(int fd, uint8_t i2c_register, uint8_t *value)
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{
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uint8_t command[] = { i2c_register };
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int ret = lspcon_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
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ret |= lspcon_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);
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int ret = parade_lspcon_write_data(fd, REGISTER_ADDRESS, command, 1);
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ret |= parade_lspcon_read_data(fd, REGISTER_ADDRESS, value, 1);
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return ret ? SPI_GENERIC_ERROR : 0;
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}
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static int lspcon_i2c_spi_register_control(int fd, packet_t *packet)
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static int parade_lspcon_register_control(int fd, packet_t *packet)
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{
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int i;
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int ret = lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->command);
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int ret = parade_lspcon_write_register(fd, SWSPI_WDATA, packet->command);
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if (ret)
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return ret;
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/* Higher 4 bits are read size. */
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int write_size = packet->data_size & 0x0f;
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for (i = 0; i < write_size; ++i) {
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ret |= lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->data[i]);
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ret |= parade_lspcon_write_register(fd, SWSPI_WDATA, packet->data[i]);
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}
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ret |= lspcon_i2c_spi_write_register(fd, SWSPI_LEN, packet->data_size);
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ret |= lspcon_i2c_spi_write_register(fd, SWSPICTL, packet->control);
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ret |= parade_lspcon_write_register(fd, SWSPI_LEN, packet->data_size);
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ret |= parade_lspcon_write_register(fd, SWSPICTL, packet->control);
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return ret;
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}
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static int lspcon_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask)
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static int parade_lspcon_wait_command_done(int fd, unsigned int offset, int mask)
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{
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uint8_t val;
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int tried = 0;
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int ret = 0;
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do {
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ret |= lspcon_i2c_spi_read_register(fd, offset, &val);
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ret |= parade_lspcon_read_register(fd, offset, &val);
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} while (!ret && (val & mask) && ++tried < MAX_SPI_WAIT_RETRIES);
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if (tried == MAX_SPI_WAIT_RETRIES) {
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@ -161,21 +161,21 @@ static int lspcon_i2c_spi_wait_command_done(int fd, unsigned int offset, int mas
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return (val & mask) ? SPI_GENERIC_ERROR : ret;
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}
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static int lspcon_i2c_spi_wait_rom_free(int fd)
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static int parade_lspcon_wait_rom_free(int fd)
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{
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uint8_t val;
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int tried = 0;
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int ret = 0;
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ret |= lspcon_i2c_spi_wait_command_done(fd, SPISTATUS,
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ret |= parade_lspcon_wait_command_done(fd, SPISTATUS,
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SPISTATUS_SECTOR_ERASE_IN_IF | SPISTATUS_SECTOR_ERASE_SEND_DONE);
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if (ret)
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return ret;
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do {
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packet_t packet = { SWSPI_WDATA_READ_REGISTER, NULL, 0, SWSPICTL_ACCESS_TRIGGER };
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ret |= lspcon_i2c_spi_register_control(fd, &packet);
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ret |= lspcon_i2c_spi_wait_command_done(fd, SWSPICTL, SWSPICTL_ACCESS_TRIGGER);
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ret |= lspcon_i2c_spi_read_register(fd, SWSPI_RDATA, &val);
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ret |= parade_lspcon_register_control(fd, &packet);
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ret |= parade_lspcon_wait_command_done(fd, SWSPICTL, SWSPICTL_ACCESS_TRIGGER);
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ret |= parade_lspcon_read_register(fd, SWSPI_RDATA, &val);
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} while (!ret && (val & SWSPICTL_ACCESS_TRIGGER) && ++tried < MAX_SPI_WAIT_RETRIES);
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if (tried == MAX_SPI_WAIT_RETRIES) {
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@ -186,72 +186,72 @@ static int lspcon_i2c_spi_wait_rom_free(int fd)
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return (val & SWSPICTL_ACCESS_TRIGGER) ? SPI_GENERIC_ERROR : ret;
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}
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static int lspcon_i2c_spi_toggle_register_protection(int fd, int toggle)
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static int parade_lspcon_toggle_register_protection(int fd, int toggle)
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{
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return lspcon_i2c_spi_write_register(fd, WRITE_PROTECTION,
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return parade_lspcon_write_register(fd, WRITE_PROTECTION,
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toggle ? WRITE_PROTECTION_OFF : WRITE_PROTECTION_ON);
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}
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static int lspcon_i2c_spi_enable_write_status_register(int fd)
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static int parade_lspcon_enable_write_status_register(int fd)
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{
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int ret = lspcon_i2c_spi_toggle_register_protection(fd, 1);
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int ret = parade_lspcon_toggle_register_protection(fd, 1);
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packet_t packet = {
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SWSPI_WDATA_ENABLE_REGISTER, NULL, 0, SWSPICTL_ACCESS_TRIGGER | SWSPICTL_NO_READ };
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ret |= lspcon_i2c_spi_register_control(fd, &packet);
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ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);
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ret |= parade_lspcon_register_control(fd, &packet);
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ret |= parade_lspcon_toggle_register_protection(fd, 0);
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return ret;
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}
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static int lspcon_i2c_spi_enable_write_status_register_protection(int fd)
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static int parade_lspcon_enable_write_status_register_protection(int fd)
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{
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int ret = lspcon_i2c_spi_toggle_register_protection(fd, 1);
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int ret = parade_lspcon_toggle_register_protection(fd, 1);
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uint8_t data[] = { SWSPI_WDATA_PROTECT_BP };
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packet_t packet = {
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SWSPI_WDATA_WRITE_REGISTER, data, 1, SWSPICTL_ACCESS_TRIGGER | SWSPICTL_NO_READ };
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ret |= lspcon_i2c_spi_register_control(fd, &packet);
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ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);
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ret |= parade_lspcon_register_control(fd, &packet);
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ret |= parade_lspcon_toggle_register_protection(fd, 0);
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return ret;
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}
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static int lspcon_i2c_spi_disable_protection(int fd)
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static int parade_lspcon_disable_protection(int fd)
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{
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int ret = lspcon_i2c_spi_toggle_register_protection(fd, 1);
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int ret = parade_lspcon_toggle_register_protection(fd, 1);
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uint8_t data[] = { SWSPI_WDATA_CLEAR_STATUS };
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packet_t packet = {
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SWSPI_WDATA_WRITE_REGISTER, data, 1, SWSPICTL_ACCESS_TRIGGER | SWSPICTL_NO_READ };
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ret |= lspcon_i2c_spi_register_control(fd, &packet);
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ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);
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ret |= parade_lspcon_register_control(fd, &packet);
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ret |= parade_lspcon_toggle_register_protection(fd, 0);
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return ret;
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}
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static int lspcon_i2c_spi_disable_hw_write(int fd)
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static int parade_lspcon_disable_hw_write(int fd)
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{
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return lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, PAGE_HW_WRITE_DISABLE);
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return parade_lspcon_write_register(fd, PAGE_HW_WRITE, PAGE_HW_WRITE_DISABLE);
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}
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static int lspcon_i2c_spi_enable_write_protection(int fd)
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static int parade_lspcon_enable_write_protection(int fd)
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{
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int ret = lspcon_i2c_spi_enable_write_status_register(fd);
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ret |= lspcon_i2c_spi_enable_write_status_register_protection(fd);
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ret |= lspcon_i2c_spi_wait_rom_free(fd);
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ret |= lspcon_i2c_spi_disable_hw_write(fd);
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int ret = parade_lspcon_enable_write_status_register(fd);
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ret |= parade_lspcon_enable_write_status_register_protection(fd);
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ret |= parade_lspcon_wait_rom_free(fd);
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ret |= parade_lspcon_disable_hw_write(fd);
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return ret;
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}
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|
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static int lspcon_i2c_spi_disable_all_protection(int fd)
|
||||
static int parade_lspcon_disable_all_protection(int fd)
|
||||
{
|
||||
int ret = lspcon_i2c_spi_enable_write_status_register(fd);
|
||||
ret |= lspcon_i2c_spi_disable_protection(fd);
|
||||
ret |= lspcon_i2c_spi_wait_rom_free(fd);
|
||||
int ret = parade_lspcon_enable_write_status_register(fd);
|
||||
ret |= parade_lspcon_disable_protection(fd);
|
||||
ret |= parade_lspcon_wait_rom_free(fd);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_send_command(const struct flashctx *flash,
|
||||
static int parade_lspcon_send_command(const struct flashctx *flash,
|
||||
unsigned int writecnt, unsigned int readcnt,
|
||||
const unsigned char *writearr,
|
||||
unsigned char *readarr)
|
||||
@ -267,9 +267,9 @@ static int lspcon_i2c_spi_send_command(const struct flashctx *flash,
|
||||
if (fd < 0)
|
||||
return SPI_GENERIC_ERROR;
|
||||
|
||||
int ret = lspcon_i2c_spi_disable_all_protection(fd);
|
||||
ret |= lspcon_i2c_spi_enable_write_status_register(fd);
|
||||
ret |= lspcon_i2c_spi_toggle_register_protection(fd, 1);
|
||||
int ret = parade_lspcon_disable_all_protection(fd);
|
||||
ret |= parade_lspcon_enable_write_status_register(fd);
|
||||
ret |= parade_lspcon_toggle_register_protection(fd, 1);
|
||||
|
||||
/* First byte of writearr should be the command value, followed by the value to write.
|
||||
Read length occupies 4 bit and represents 16 level, thus if read 1 byte,
|
||||
@ -279,67 +279,67 @@ static int lspcon_i2c_spi_send_command(const struct flashctx *flash,
|
||||
SWSPICTL_ACCESS_TRIGGER | (readcnt ? 0 : SWSPICTL_NO_READ),
|
||||
};
|
||||
|
||||
ret |= lspcon_i2c_spi_register_control(fd, &packet);
|
||||
ret |= lspcon_i2c_spi_wait_command_done(fd, SWSPICTL, SWSPICTL_ACCESS_TRIGGER);
|
||||
ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);
|
||||
ret |= parade_lspcon_register_control(fd, &packet);
|
||||
ret |= parade_lspcon_wait_command_done(fd, SWSPICTL, SWSPICTL_ACCESS_TRIGGER);
|
||||
ret |= parade_lspcon_toggle_register_protection(fd, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < readcnt; ++i) {
|
||||
ret |= lspcon_i2c_spi_read_register(fd, SWSPI_RDATA, &readarr[i]);
|
||||
ret |= parade_lspcon_read_register(fd, SWSPI_RDATA, &readarr[i]);
|
||||
}
|
||||
|
||||
ret |= lspcon_i2c_spi_wait_rom_free(fd);
|
||||
ret |= parade_lspcon_wait_rom_free(fd);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_enable_hw_write(int fd)
|
||||
static int parade_lspcon_enable_hw_write(int fd)
|
||||
{
|
||||
int ret = 0;
|
||||
ret |= lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, PAGE_HW_COFIG_REGISTER);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, PAGE_HW_WRITE_ENABLE);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, 0x50);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, 0x41);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, 0x52);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, 0x44);
|
||||
ret |= parade_lspcon_write_register(fd, PAGE_HW_WRITE, PAGE_HW_COFIG_REGISTER);
|
||||
ret |= parade_lspcon_write_register(fd, PAGE_HW_WRITE, PAGE_HW_WRITE_ENABLE);
|
||||
ret |= parade_lspcon_write_register(fd, PAGE_HW_WRITE, 0x50);
|
||||
ret |= parade_lspcon_write_register(fd, PAGE_HW_WRITE, 0x41);
|
||||
ret |= parade_lspcon_write_register(fd, PAGE_HW_WRITE, 0x52);
|
||||
ret |= parade_lspcon_write_register(fd, PAGE_HW_WRITE, 0x44);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_clt2_spi_reset(int fd)
|
||||
static int parade_lspcon_i2c_clt2_spi_reset(int fd)
|
||||
{
|
||||
int ret = 0;
|
||||
ret |= lspcon_i2c_spi_write_register(fd, CLT2_SPI, 0x20);
|
||||
ret |= parade_lspcon_write_register(fd, CLT2_SPI, 0x20);
|
||||
struct timespec wait_100ms = { 0, (unsigned)1e8 };
|
||||
nanosleep(&wait_100ms, NULL);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, CLT2_SPI, 0x00);
|
||||
ret |= parade_lspcon_write_register(fd, CLT2_SPI, 0x00);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_set_mpu_active(int fd, int running)
|
||||
static int parade_lspcon_set_mpu_active(int fd, int running)
|
||||
{
|
||||
int ret = 0;
|
||||
// Cmd mode
|
||||
ret |= lspcon_i2c_spi_write_register(fd, MPU, 0xc0);
|
||||
ret |= parade_lspcon_write_register(fd, MPU, 0xc0);
|
||||
// Stop or release MPU
|
||||
ret |= lspcon_i2c_spi_write_register(fd, MPU, running ? 0 : 0x40);
|
||||
ret |= parade_lspcon_write_register(fd, MPU, running ? 0 : 0x40);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_map_page(int fd, unsigned int offset)
|
||||
static int parade_lspcon_map_page(int fd, unsigned int offset)
|
||||
{
|
||||
int ret = 0;
|
||||
/* Page number byte, need to / LSPCON_PAGE_SIZE. */
|
||||
ret |= lspcon_i2c_spi_write_register(fd, ROMADDR_BYTE1, (offset >> 8) & 0xff);
|
||||
ret |= lspcon_i2c_spi_write_register(fd, ROMADDR_BYTE2, (offset >> 16));
|
||||
/* Page number byte, need to / PAGE_SIZE. */
|
||||
ret |= parade_lspcon_write_register(fd, ROMADDR_BYTE1, (offset >> 8) & 0xff);
|
||||
ret |= parade_lspcon_write_register(fd, ROMADDR_BYTE2, (offset >> 16));
|
||||
|
||||
return ret ? SPI_GENERIC_ERROR : 0;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
|
||||
static int parade_lspcon_read(struct flashctx *flash, uint8_t *buf,
|
||||
unsigned int start, unsigned int len)
|
||||
{
|
||||
unsigned int i;
|
||||
@ -351,32 +351,32 @@ static int lspcon_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
|
||||
if (fd < 0)
|
||||
return SPI_GENERIC_ERROR;
|
||||
|
||||
for (i = 0; i < len; i += LSPCON_PAGE_SIZE) {
|
||||
ret |= lspcon_i2c_spi_map_page(fd, start + i);
|
||||
ret |= lspcon_i2c_spi_read_data(fd, PAGE_ADDRESS, buf + i, min(len - i, LSPCON_PAGE_SIZE));
|
||||
update_progress(flash, FLASHROM_PROGRESS_READ, i + LSPCON_PAGE_SIZE, len);
|
||||
for (i = 0; i < len; i += PAGE_SIZE) {
|
||||
ret |= parade_lspcon_map_page(fd, start + i);
|
||||
ret |= parade_lspcon_read_data(fd, PAGE_ADDRESS, buf + i, min(len - i, PAGE_SIZE));
|
||||
update_progress(flash, FLASHROM_PROGRESS_READ, i + PAGE_SIZE, len);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_write_page(int fd, const uint8_t *buf, unsigned int len)
|
||||
static int parade_lspcon_write_page(int fd, const uint8_t *buf, unsigned int len)
|
||||
{
|
||||
/**
|
||||
* Using static buffer with maximum possible size,
|
||||
* extra byte is needed for prefixing zero at index 0.
|
||||
*/
|
||||
uint8_t write_buffer[LSPCON_PAGE_SIZE + 1] = { 0 };
|
||||
if (len > LSPCON_PAGE_SIZE)
|
||||
uint8_t write_buffer[PAGE_SIZE + 1] = { 0 };
|
||||
if (len > PAGE_SIZE)
|
||||
return SPI_GENERIC_ERROR;
|
||||
|
||||
/* First byte represents the writing offset and should always be zero. */
|
||||
memcpy(&write_buffer[1], buf, len);
|
||||
|
||||
return lspcon_i2c_spi_write_data(fd, PAGE_ADDRESS, write_buffer, len + 1);
|
||||
return parade_lspcon_write_data(fd, PAGE_ADDRESS, write_buffer, len + 1);
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
|
||||
static int parade_lspcon_write_256(struct flashctx *flash, const uint8_t *buf,
|
||||
unsigned int start, unsigned int len)
|
||||
{
|
||||
int ret = 0;
|
||||
@ -387,24 +387,24 @@ static int lspcon_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
|
||||
if (fd < 0)
|
||||
return SPI_GENERIC_ERROR;
|
||||
|
||||
ret |= lspcon_i2c_spi_disable_all_protection(fd);
|
||||
ret |= parade_lspcon_disable_all_protection(fd);
|
||||
/* Enable hardware write and reset clt2SPI interface. */
|
||||
ret |= lspcon_i2c_spi_enable_hw_write(fd);
|
||||
ret |= lspcon_i2c_clt2_spi_reset(fd);
|
||||
ret |= parade_lspcon_enable_hw_write(fd);
|
||||
ret |= parade_lspcon_i2c_clt2_spi_reset(fd);
|
||||
|
||||
for (unsigned int i = 0; i < len; i += LSPCON_PAGE_SIZE) {
|
||||
ret |= lspcon_i2c_spi_map_page(fd, start + i);
|
||||
ret |= lspcon_i2c_spi_write_page(fd, buf + i, min(len - i, LSPCON_PAGE_SIZE));
|
||||
update_progress(flash, FLASHROM_PROGRESS_WRITE, i + LSPCON_PAGE_SIZE, len);
|
||||
for (unsigned int i = 0; i < len; i += PAGE_SIZE) {
|
||||
ret |= parade_lspcon_map_page(fd, start + i);
|
||||
ret |= parade_lspcon_write_page(fd, buf + i, min(len - i, PAGE_SIZE));
|
||||
update_progress(flash, FLASHROM_PROGRESS_WRITE, i + PAGE_SIZE, len);
|
||||
}
|
||||
|
||||
ret |= lspcon_i2c_spi_enable_write_protection(fd);
|
||||
ret |= lspcon_i2c_spi_disable_hw_write(fd);
|
||||
ret |= parade_lspcon_enable_write_protection(fd);
|
||||
ret |= parade_lspcon_disable_hw_write(fd);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
|
||||
static int parade_lspcon_write_aai(struct flashctx *flash, const uint8_t *buf,
|
||||
unsigned int start, unsigned int len)
|
||||
{
|
||||
msg_perr("%s: AAI write function is not supported.\n",
|
||||
@ -412,48 +412,48 @@ static int lspcon_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
|
||||
return SPI_GENERIC_ERROR;
|
||||
}
|
||||
|
||||
static int lspcon_i2c_spi_shutdown(void *data)
|
||||
static int parade_lspcon_shutdown(void *data)
|
||||
{
|
||||
int ret = 0;
|
||||
struct lspcon_i2c_spi_data *lspcon_data =
|
||||
(struct lspcon_i2c_spi_data *)data;
|
||||
int fd = lspcon_data->fd;
|
||||
struct parade_lspcon_data *parade_lspcon_data =
|
||||
(struct parade_lspcon_data *)data;
|
||||
int fd = parade_lspcon_data->fd;
|
||||
|
||||
ret |= lspcon_i2c_spi_enable_write_protection(fd);
|
||||
ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);
|
||||
ret |= lspcon_i2c_spi_set_mpu_active(fd, 1);
|
||||
ret |= parade_lspcon_enable_write_protection(fd);
|
||||
ret |= parade_lspcon_toggle_register_protection(fd, 0);
|
||||
ret |= parade_lspcon_set_mpu_active(fd, 1);
|
||||
i2c_close(fd);
|
||||
free(data);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct spi_master spi_master_i2c_lspcon = {
|
||||
static const struct spi_master spi_master_parade_lspcon = {
|
||||
.max_data_read = 16,
|
||||
.max_data_write = 12,
|
||||
.command = lspcon_i2c_spi_send_command,
|
||||
.command = parade_lspcon_send_command,
|
||||
.multicommand = default_spi_send_multicommand,
|
||||
.read = lspcon_i2c_spi_read,
|
||||
.write_256 = lspcon_i2c_spi_write_256,
|
||||
.write_aai = lspcon_i2c_spi_write_aai,
|
||||
.shutdown = lspcon_i2c_spi_shutdown,
|
||||
.read = parade_lspcon_read,
|
||||
.write_256 = parade_lspcon_write_256,
|
||||
.write_aai = parade_lspcon_write_aai,
|
||||
.shutdown = parade_lspcon_shutdown,
|
||||
.probe_opcode = default_spi_probe_opcode,
|
||||
};
|
||||
|
||||
static int lspcon_i2c_spi_init(void)
|
||||
static int parade_lspcon_init(void)
|
||||
{
|
||||
int fd = i2c_open_from_programmer_params(REGISTER_ADDRESS, 0);
|
||||
if (fd < 0)
|
||||
return fd;
|
||||
|
||||
int ret = lspcon_i2c_spi_set_mpu_active(fd, 0);
|
||||
int ret = parade_lspcon_set_mpu_active(fd, 0);
|
||||
if (ret) {
|
||||
msg_perr("%s: call to set_mpu_active failed.\n", __func__);
|
||||
i2c_close(fd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
struct lspcon_i2c_spi_data *data = calloc(1, sizeof(*data));
|
||||
struct parade_lspcon_data *data = calloc(1, sizeof(*data));
|
||||
if (!data) {
|
||||
msg_perr("Unable to allocate space for extra SPI master data.\n");
|
||||
i2c_close(fd);
|
||||
@ -462,14 +462,14 @@ static int lspcon_i2c_spi_init(void)
|
||||
|
||||
data->fd = fd;
|
||||
|
||||
return register_spi_master(&spi_master_i2c_lspcon, data);
|
||||
return register_spi_master(&spi_master_parade_lspcon, data);
|
||||
}
|
||||
|
||||
const struct programmer_entry programmer_lspcon_i2c_spi = {
|
||||
.name = "lspcon_i2c_spi",
|
||||
const struct programmer_entry programmer_parade_lspcon = {
|
||||
.name = "parade_lspcon",
|
||||
.type = OTHER,
|
||||
.devs.note = "Device files /dev/i2c-*.\n",
|
||||
.init = lspcon_i2c_spi_init,
|
||||
.init = parade_lspcon_init,
|
||||
.map_flash_region = fallback_map,
|
||||
.unmap_flash_region = fallback_unmap,
|
||||
.delay = internal_delay,
|
||||
@ -124,8 +124,8 @@ const struct programmer_entry *const programmer_table[] = {
|
||||
&programmer_linux_spi,
|
||||
#endif
|
||||
|
||||
#if CONFIG_LSPCON_I2C_SPI == 1
|
||||
&programmer_lspcon_i2c_spi,
|
||||
#if CONFIG_PARADE_LSPCON == 1
|
||||
&programmer_parade_lspcon,
|
||||
#endif
|
||||
|
||||
#if CONFIG_MEDIATEK_I2C_SPI == 1
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user