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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 22:43:17 +02:00

Add support for RayeR SPIPGM hardware as described in http://rayer.ic.cz/elektro/spipgm.htm

To use the RayeR driver, run
flashrom -p rayer_spi -V

Known bugs/limitations:
- Won't compile/work on non-x86 architectures.
- Will always use direct port I/O access.

Log follows:

flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 
4.3.2, little endian
Calibrating delay loop... OK.
Initializing rayer_bitbang_spi programmer
Using port 0x378 as I/O base for parallel port access.
...
Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 
0xc2, id2 0x2015
...
Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 
0xffe00000.
...
No operations were specified.

Corresponding to flashrom svn r1093.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Martin Rehak <rayer@seznam.cz>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
Carl-Daniel Hailfinger
2010-07-21 10:26:01 +00:00
parent 17e23ac979
commit e7fdd6e9a1
6 changed files with 193 additions and 2 deletions

View File

@ -187,6 +187,9 @@ USB SPI programmer)"
.sp
.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
.sp
.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport \
based programmer)"
.sp
Some programmers have optional or mandatory parameters which are described
in detail in the
.B PROGRAMMER SPECIFIC INFO
@ -389,6 +392,10 @@ where
can be any of
.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M ", " 8M
(in Hz). The default is the maximum frequency of 8 MHz.
.TP
.BR "rayer_spi " programmer
No parameters defined yet. More information about the hardware is available at
http://rayer.ic.cz/elektro/spipgm.htm
.SH EXIT STATUS
flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
@ -411,6 +418,9 @@ needs PCI configuration space access and raw I/O port access.
.BR gfxnvidia " and " drkaiser
need PCI configuration space access and raw memory access.
.sp
.B rayer_spi
needs raw I/O port access.
.sp
.B satasii
needs PCI configuration space read access and raw memory access.
.sp